SH7706 datasheet(28/749 Pages) RENESAS

28 / 749 page

Rev. 5.00 May 29, 2006 page xxviii of xlviii

9.6.2

Example of DMA Transfer between External Memory and SCIF Transmitter

(Indirect Address on) ........................................................................................... 299

9.7

Cautions ............................................................................................................................ 301

Section 10 Clock Pulse Generator (CPG)..................................................................... 303

10.1

Feature .............................................................................................................................. 303

10.2

Input/Output Pin................................................................................................................ 306

10.3

Clock Operating Modes .................................................................................................... 306

10.4

Register Description.......................................................................................................... 310

10.4.1 Frequency Control Register (FRQCR)................................................................. 310

10.5

Operation .......................................................................................................................... 312

10.5.1 Changing the Multiplication Rate ........................................................................ 312

10.5.2 Changing the Division Ratio................................................................................ 312

10.6

Usage Note........................................................................................................................ 313

Section 11 Watchdog Timer (WDT).............................................................................. 315

11.1

Feature .............................................................................................................................. 315

11.2

Register Description.......................................................................................................... 316

11.2.1 Watchdog Timer Counter (WTCNT)................................................................... 316

11.2.2 Watchdog Timer Control/Status Register (WTCSR)........................................... 316

11.2.3 Notes on Register Access..................................................................................... 318

11.3

Operation .......................................................................................................................... 319

11.3.1 Canceling Software Standbys .............................................................................. 319

11.3.2 Changing the Frequency ...................................................................................... 320

11.3.3 Using Watchdog Timer Mode.............................................................................. 320

11.3.4 Using Interval Timer Mode ................................................................................. 321

Section 12 Timer Unit (TMU) ......................................................................................... 323

12.1

Feature .............................................................................................................................. 323

12.2

Input/Output Pin................................................................................................................ 325

12.3

Register Description.......................................................................................................... 325

12.3.1 Timer Output Control Register (TOCR) .............................................................. 326

12.3.2 Timer Start Register (TSTR)................................................................................ 327

12.3.3 Timer Control Registers 0 to 2 (TCR_0 to TCR_2)............................................. 328

12.3.4 Timer Constant Registers 0 to 2 (TCOR_0 to TCOR_2)..................................... 331

12.3.5 Timer Counters 0 to 2 (TCNT_0 to TCNT_2)..................................................... 332

12.3.6 Input Capture Register 2 (TCPR_2)..................................................................... 332

12.4

Operation .......................................................................................................................... 332

12.4.1 Counter Operation................................................................................................ 333

12.4.2 Input Capture Function ........................................................................................ 336

12.5

Interrupts ........................................................................................................................... 337

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