SH7706 datasheet(30/749 Pages) RENESAS

30 / 749 page

Rev. 5.00 May 29, 2006 page xxx of xlviii

14.3

Register Description.......................................................................................................... 367

14.3.1 Receive Shift Register (SCRSR).......................................................................... 368

14.3.2 Receive Data Register (SCRDR) ......................................................................... 368

14.3.3 Transmit Shift Register (SCTSR) ........................................................................ 368

14.3.4 Transmit Data Register (SCTDR)........................................................................ 368

14.3.5 Serial Mode Register (SCSMR)........................................................................... 369

14.3.6 Serial Control Register (SCSCR)......................................................................... 372

14.3.7 Serial Status Register (SCSSR)............................................................................ 376

14.3.8 SC Port Control Register (SCPCR)...................................................................... 381

14.3.9 SC Port Data Register (SCPDR) .......................................................................... 382

14.3.10 Bit Rate Register (SCBRR).................................................................................. 383

14.4

Operation .......................................................................................................................... 390

14.4.1 Operation in Asynchronous Mode ....................................................................... 392

14.4.2 Multiprocessor Communication........................................................................... 402

14.4.3 Clock Synchronous Operation ............................................................................. 410

14.5

SCI Interrupt Sources........................................................................................................ 417

14.6

Usage Note........................................................................................................................ 418

Section 15 Smart Card Interface ..................................................................................... 421

15.1

Feature .............................................................................................................................. 421

15.2

Input/Output Pin................................................................................................................ 423

15.3

Register Description.......................................................................................................... 423

15.3.1 Smart Card Mode Register (SCSCMR) ............................................................... 424

15.3.2 Serial Status Register (SCSSR)............................................................................ 425

15.4

Operation .......................................................................................................................... 427

15.4.1 Overview.............................................................................................................. 427

15.4.2 Pin Connections ................................................................................................... 427

15.4.3 Data Format ......................................................................................................... 428

15.4.4 Register Settings .................................................................................................. 429

15.4.5 Clock.................................................................................................................... 431

15.4.6 Data Transmission and Reception........................................................................ 433

15.5

Usage Note........................................................................................................................ 437

Section 16 Serial Communication Interface with FIFO (SCIF)............................. 441

16.1

Feature .............................................................................................................................. 441

16.2

Input/Output Pin................................................................................................................ 445

16.3

Register Description.......................................................................................................... 445

16.3.1 Receive Shift Register 2 (SCRSR2)..................................................................... 446

16.3.2 Receive FIFO Data Register 2 (SCFRDR2) ........................................................ 446

16.3.3 Transmit Shift Register 2 (SCTSR2) ................................................................... 446

16.3.4 Transmit FIFO Data Register 2 (SCFTDR2) ....................................................... 446

SH7706 Datasheet(PDF) 30 Page - Renesas Technology Corp

SH7706 Datasheet(HTML) 30 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL