7540 datasheet(204/366 Pages) RENESAS

204 / 366 page

2-128

REJ09B0018-0200Z

Rev.2.00

Jun 21, 2004

APPLICATION

7540 Group

2.7 Serial I/O2

2.7.4 Notes on serial I/O2

Notes on using serial I/O2 are described below.

(1) Note on serial I/O1

Serial I/O2 can be used only when serial I/O1 is not used or serial I/O1 is used as UART and the

BRG output divided by 16 is selected as the synchronous clock.

(2) Note on SCLK2 pin

When an external clock is selected, set “0” to bit 2 of the port P1 direction register (input mode).

(3) Note on SDATA2 pin

When P13/SRDY1/SDATA2 pin is used as the SDATA input, set “0” to bit 3 of the port P1 direction register

(input mode).

When the internal clock is selected as the transfer and P13/SDATA2 pin is set to the input mode, the

SDATA2 pin is in a high-impedance state after the data transfer is completed.

(4) Notes on serial I/O2 transmit/receive shift completion flag

➀ The transmit/receive shift completion flag of the serial I/O2 control register is “1” after transmit/

receive shift is completed. In order to set “0” to this flag, set data (dummy data at receive) to the

serial I/O2 register by program.

➁ Bit 7 (transmit/receive shift completion flag) of the serial I/O2 control register is set earlier than

the completion of the actual shift operation for a half cycle of shift clock. Accordingly, when the

shift completion is checked by using this bit, read/write the serial I/O2 register after a half or more

cycle of clock from the setting “1” to this bit is checked.

7540 Datasheet(PDF) 204 Page - Renesas Technology Corp