7540 datasheet(205/366 Pages) RENESAS

205 / 366 page

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REJ09B0018-0200Z

Rev.2.00

Jun 21, 2004

7540 Group

APPLICATION

2.8 A/D converter

This paragraph explains the registers setting method and the notes relevant to the A/D converter.

2.8.1 Memory map

Fig. 2.8.1 Memory map of registers relevant to A/D converter

2.8.2 Relevant registers

Fig. 2.8.2 Structure of A/D control register

003416

003516

003616

003D16

A/D control register (ADCON)

A/D conversion register (low-order) (ADL)

A/D conversion register (high-order) (ADH)

Interrupt request register 2 (IREQ2)

003F16

Interrupt control register 2 (ICON2)

b7 b6 b5 b4 b3 b2 b1 b0

Function

At reset

Name

A/D control register (ADCON) [Address : 3416]

Nothing is allocated for this bit. This is a write disabled bit.

When this bit is read out, the value is “0”.

A/D control register

Note: These can be used only for the 36-pin package versions.

0 0 0 : P20/AN0

0 0 1 : P21/AN1

0 1 0 : P22/AN2

0 1 1 : P23/AN3

1 0 0 : P24/AN4

1 0 1 : P25/AN5

1 1 0 : P26/AN6

(Note)

1 1 1 : P27/AN7

(Note)

Analog input pin selection bits b2 b1 b0

AD conversion completion bit

0 : Conversion in progress

1 : Conversion completed

Nothing is allocated for these bits. These are write disabled bits.

When these bits are read out, the values are “0”.

✽: This bit can be cleared to “0” by program, but cannot be set to “1”.

✽

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