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7540 Datasheet(PDF) 210 Page - Renesas Technology Corp |
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7540 Datasheet(HTML) 210 Page - Renesas Technology Corp |
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210 / 366 page ![]() 2-134 REJ09B0018-0200Z Rev.2.00 Jun 21, 2004 APPLICATION 7540 Group 2.8 A/D converter 2.8.4 Notes on A/D converter Notes on A/D converter are described below. (1) Analog input pin Figure 2.8.10 shows the internal equivalent circuit of an analog input. In order to execute the A/D conversion correctly, to complete the charge to an internal capacitor within the specified time is required. The maximum output impedance of the analog input source required to complete the charge to a capacitor within the specified time is as follows; About 35 k Ω (at f(XIN) = 8 MHz) When the maximum output impedance exceeds the above value, equip an analog input pin with an external capacitor of 0.01 µF to 1µF between an analog input pin and VSS. Further, be sure to verify the operation of application products on the user side. q Reason An analog input pin includes the capacitor for analog voltage comparison. Accordingly, when signals from signal source with high impedance are input to an analog input pin, charge and discharge noise generates. This may cause the A/D conversion/comparison precision to be worse. (2) Clock frequency during A/D conversion The comparator consists of a capacity coupling, and a charge of the capacity will be lost if the clock frequency is too low. Thus, make sure the following during an A/D conversion. • f(XIN) is 500 kHz or more • Do not execute the STP instruction (3) Note on A/D converter As for AD translation accuracy, on the following operating conditions, accuracy may become low. (1) Since the analog circuit inside a microcomputer becomes sensitive to noise when VREF voltage is set up lower than Vcc voltage, accuracy may become low rather than the case where VREF voltage and Vcc voltage are set up to the same value. (2) When VREF voltage is lower than [3.0 V], the accuracy at the low temperature may become extremely low compared with that at room temperature When the system would be used at low temperature, the use at VREF=3.0 V or more is recommended. Fig. 2.8.10 Connection diagram ANi (i=0 to 7: 36-pin version i=0 to 5: 32-pin version) C1 12 pF(Typical) Notes 1: This is a parasitic diode. 2: Only the selected analog input pin is turned on. C2 1.5 pF(Typical) Chopper Amp. A/D control circuit Typical voltage generation circuit Switch tree, ladder resistor 1.5 k Ω(Typical) VSS VSS VCC VSS VREF R (Note 1) SW1 (Note 2) (Note 1) |
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