7220 datasheet(198/303 Pages) RENESAS

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APPLICATION

5.4 Example of I2C-BUS interface control (M37221Mx-XXXSP/FP)

5-25

7220 Group User’s Manual

(3)

Data output processing routine

The data output processing routine is the common routine within the transmit/receive processing

routine.

Fig. 5.4.6 Flowchart of data output processing routine

Data output

S0 (address 00D7 16)

←Data to be output

END

S1 (address 00D9 16)

←111100002

1-byte data transmit completes?

Store the number of output bytes to internal RAM

The first byte ?

Store the next data to A

The last byte ?

= 1 (No ACK)

No ACK?

Output A.

Yes

END

Preparation for judging timeout.

No error

TRX = 0 :

AL = 1 :

= 0 (Completion of 1-byte data transmit)

= 1 (Not yet)

Yes

An error occurs when data

transmit does not end within a

certain period.

An error

such as timeout occurs ?

TRX (bit 6 at address 00D9 16)

≠“0” or

AL (bit 3 at address 00D9 16)

≠“1” ?

Error

PIN (bit 4 at address 00D9 16)

≠ “1” ?

Stop judging of timeout.

LRB (bit 0 at address 00D9 16)

≠ “1” ?

= 0 (ACK)

S0:

S1:

TRX:

AL:

PIN:

LRB:

Accumulator

I2C data shift register

I2C status register

Communication mode specification bit

Arbitration lost detecting flag

Multi-master I2C interface interrupt

enable bit

Last receive bit

arbitration lost is

detected (error)

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