H83069RF datasheet(276/1003 Pages) RENESAS

276 / 1003 page

Rev. 5.0, 09/04, page 254 of 978

Table 8.1

Port Functions

Expanded Modes

Single-Chip Modes

Port

Description

Pins

Mode 1

Mode 2

Mode 3

Mode 4 Mode 5

Mode 7

Port 1 • 8-bit I/O port

Can drive LEDs

7 to P10/

7 to A0

Address output pins (A

7 to A0)

Address output (A

7 to

0) and generic input

DDR = 0:

generic input

DDR = 1:

address output

Generic input/output

Port 2 • 8-bit I/O port

Built-in input pull-

up transistors

Can drive LEDs

7 to P20/

15 to A8

Address output pins (A

15 to A8)

Address output (A

15 to

8) and generic input

DDR = 0:

generic input

DDR = 1:

address output

Generic input/output

Port 3 • 8-bit I/O port

7 to P30/

15 to D8

Data input/output (D

15 to D8)

Generic input/output

Port 4 • 8-bit I/O port

• Built-in input pull-

up transistors

7 to P40/

7 to D0

Data input/output (D

7 to D0) and 8-bit generic input/output

8-bit bus mode: generic input/output

16-bit bus mode: data input/output

Generic input/output

Port 5 • 4-bit I/O port

• Built-in input pull-

up transistors

• Can drive LEDs

3 to P50/

19 to A16

Address output (A

19 to A16)

Address output (A

19 to

16) and 4-bit

generic input

DDR = 0: generic input

DDR = 1: address output

Generic input/output

Port 6 • 7-bit I/O port and

1-bit input port

7/φ

Clock output (

φ) and generic input

6/LWR

5/HWR

4/RD

3/AS

Bus control signal output (

LWR, HWR, RD, AS)

Generic input/output

2/BACK

1/BREQ

0/WAIT

Bus control signal input/output (

BACK, BREQ, WAIT) and

3-bit generic input/output

Port 7 • 8-bit input port

7/AN7/DA1

6/AN6/DA0

Analog input (AN

7, AN6) to A/D converter, analog output (DA1, DA0)

from D/A converter, and generic input

5 to P70/

5 to AN0

Analog input (AN

5 to AN0) to A/D converter, and generic input

Port 8

• 5-bit I/O port

• P8

2 to P80 have

Schmitt inputs

4/CS0

DDR = 0: generic input

DDR = 1 (reset value):

0 output

DDR = 0 (reset value):

generic input

DDR = 1:

0 output

Generic input/output

3/IRQ3/

1/ADTRG

IRQ

3 input, CS1 output, external trigger input (ADTRG) to A/D converter,

and generic input

DDR = 0 (after reset): generic input

DDR = 1:

1 output

IRQ

3 input, external

trigger input (

ADTRG) to

A/D converter, and

generic input/output

2/IRQ2/CS2

1/IRQ1/CS3

IRQ

2 and IRQ1 input, CS2 and CS3 output, and generic input*

DDR = 0 (reset value): generic input

DDR = 1:

2 and CS3 output

IRQ

2 and IRQ1 input and

generic input/output

0/IRQ0

RFSH

IRQ

0 input, RFSH output, and generic input/output

IRQ

0 input and generic

input/output

Note:

1 can be used as an output port by making a setting in DRCRA.

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