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H83069RF Datasheet(PDF) 280 Page - Renesas Technology Corp |
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H83069RF Datasheet(HTML) 280 Page - Renesas Technology Corp |
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280 / 1003 page ![]() Rev. 5.0, 09/04, page 258 of 978 In modes 1 to 4, P1DDR bits are always read as 1, and cannot be modified. In modes 5 and 7, P1DDR is a write-only register. Its value cannot be read. All bits return 1 when read. P1DDR is initialized to H'FF in modes 1 to 4, and to H'00 in modes 5 and 7, by a reset and in hardware standby mode. In software standby mode it retains its previous setting. Therefore, if a transition is made to software standby mode while port 1 is functioning as an input/output port and a P1DDR bit is set to 1, the corresponding pin maintains its output state. Port 1 Data Register (P1DR): P1DR is an 8-bit readable/writable register that stores port 1 output data. When port 1 functions as an output port, the value of this register is output. When this register is read, the pin logic level is read for bits for which the P1DDR setting is 0, and the P1DR value is read for bits for which the P1DDR setting is 1. Bit Initial value Read/Write 7 P1 0 R/W Port 1 data 7 to 0 These bits store data for port 1 pins 7 6 P1 0 R/W 6 5 P1 0 R/W 5 4 P1 0 R/W 4 3 P1 0 R/W 3 2 P1 0 R/W 2 1 P1 0 R/W 1 0 P1 0 R/W 0 P1DR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode it retains its previous setting. |
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