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H83069RF Datasheet(PDF) 277 Page - Renesas Technology Corp

Part # H83069RF
Description  Renesas 16-Bit Single-Chip Microcomputer
PDF  1003 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H83069RF Datasheet(HTML) 277 Page - Renesas Technology Corp

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Rev. 5.0, 09/04, page 255 of 978
Expanded Modes
Single-Chip Modes
Port
Description
Pins
Mode 1
Mode 2
Mode 3
Mode 4
Mode 5
Mode 7
Port 9 • 6-bit I/O port
P9
5/IRQ5
/SCK
1
P9
4/IRQ4
/SCK
0
P9
3/RxD1
P9
2/RxD0
P9
1/TxD1
P9
0/TxD0
Input and output (SCK
1, SCK0, RxD1, RxD0, TxD1, TxD0) for serial communication interfaces 1 and 0
(SCI1/0),
IRQ
5 and IRQ4 input, and 6-bit generic input/output
Port A • 8-bit I/O port
• Schmitt inputs
PA
7/TP7/
TIOCB
2/A20
Output (TP
7) from pro-
grammable timing
pattern controller (TPC),
input or output (TIOCB
2)
for 16-bit timer and
generic input/output
Address output
(A
20)
Address output (A
20),
TPC output (TP
7),
input or output
(TIOCB
2) for 16-bit
timer, and generic
input/output
TPC output (TP
7), 16-bit
timer input or output
(TIOCB
2), and generic
input/output
PA
6/TP6/
TIOCA
2/A21
PA
5/TP5/
TIOCB
1/A22
PA
4/TP4/
TIOCA
1/A23
TPC output (TP
6 to TP4),
16-bit timer input and
output (TIOCA
2, TIOCB1,
TIOCA
1) , and generic
input/output
TPC output (TP
6 to TP4),16-bit timer input and
output (TIOCA
2, TIOCB1, TIOCA1), address
output (A
23 to A21), and generic input/output
TPC output (TP
6 to TP4),
16-bit timer input and
output (TIOCA
2, TIOCB1,
TIOCA
1) and generic
input/output
PA
3/TP3/
TIOCB
0/
TCLKD
PA
2/TP2/
TIOCA
0/
TCLKC
PA
1/TP1/
TCLKB
/
TEND
1
PA
0/TP0/
TCLKA
/
TEND
0
TPC output (TP
3 to TP0), 16-bit timer input and output (TIOCB0, TIOCA0, TCLKD, TCLKC, TCLKB,
TCLKA), 8-bit timer input (TCLKD, TCLKC, TCLKB, TCLKA), output (
TEND
1, TEND0) from DMA
controller (DMAC), and generic input/output
Port B • 8-bit I/O port
PB
7/TP15/
RXD
2
PB
6/TP14/
TXD
2
PB
5/TP13/
SCK
2/LCAS
PB
4/TP12/
UCAS
TPC output (TP
15 to TP12), SCI2 input and output (SCK2 , RxD2, TxD2), DRAM
interface output (
LCAS, UCAS), and generic input/output
TPC output (TP
15 to
TP
12), SCI2 input and
output (SCK
2, RxD2,
TxD
2), and generic
input/output
PB
3/TP11/
TMIO
3/
DREQ
1/CS4
PB
2/TP10/
TMO
2/CS5
PB
1/TP9/
TMIO
1/
DREQ
0/CS6
PB
0/TP8/
TMO
0/CS7
TPC output (TP
11 to TP8), 8-bit timer input and output (TMIO3, TMO2, TMIO1,
TMO
0), DMAC input (DREQ1, DREQ0), CS7 to CS4 output, and generic
input/output
TPC output (TP
11 to TP8),
8-bit timer input and
output (TMIO
3, TMO2,
TMIO
1, TMO0), DMAC
input (
DREQ
1, DREQ0),
and generic input/output



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