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ISO1176 Datasheet(PDF) 18 Page - Texas Instruments |
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ISO1176 Datasheet(HTML) 18 Page - Texas Instruments |
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18 / 25 page ![]() THERMAL CHARACTERISTICS 0 25 50 75 100 125 150 0 50 100 150 200 T -CaseTemperature-°C C V at5.5V CC1,2 PACKAGE CHARACTERISTICS ISO1176 SLLS897C – MARCH 2008 – REVISED OCTOBER 2008.................................................................................................................................................. www.ti.com over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Low-K thermal resistance(1) 168 θ JA Junction-to-air °C/W High-K board(1) 96.1 θ JB Junction-to-board thermal resistance 61 °C/W θ JC Junction-to-case thermal resistance 48 °C/W Vcc1 = Vcc2 = 5.25 V, TJ = 150°C, CL = 15 pF, PD Device power dissipation 220 mW Input a 20 MHz 50% duty cycle square wave (1) Tested in accordance with the Low-K or High-K thermal metric definitions of EIA/JESD51-3 for leaded surface mount packages. Figure 28. DW-16 θ JC Thermal Derating Curve per IEC 60747-5-2 over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT L(I01) Minimum air gap (Clearance) Shortest terminal to terminal distance 8.34 mm through air L(I02) Minimum external tracking (Creepage)(1) Shortest terminal to terminal distance 8.1 mm across the package surface CTI Tracking resistance (Comparative Tracking DIN IEC 60112 / VDE 0303 Part 1 ≥175 V Index) Minimum Internal Gap (Internal Clearance) Distance through the insulation 0.008 mm RIO Isolation resistance Input to output, VIO = 500 V, all pins on each side of the barrier tied together >1012 Ω creating a two-terminal device CIO Barrier capacitance Input to output VI = 0.4 sin (4E6πt) 2 pF CI Input capacitance to ground VI = 0.4 sin (4E6πt) 2 pF (1) Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application. Care should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on the printed circuit board do not reduce this distance. Creepage and clearance on a printed circuit board become equal according to the measurement techniques shown in the Isolation Glossary. Techniques such as inserting grooves and/or ribs on a printed circuit board are used to help increase these specifications. 18 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s) :ISO1176 |
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