TEA2028 datasheet(43/47 Pages) STMICROELECTRONICS

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The bias voltage ”VB” is supplied by the secondary

winding of EHT transformer. The parabolic effect is

due to the integration of frame saw-tooth by the

filtering capacitor ”C1”.

DVB =

⋅ T

⋅ C1

= 0.95V

Where :

-IY : Peak-to-peak yoke current = 380mApp

- T : 20ms

- C1 = 1000

µF

VIII.5 - Frame Flyback

During flyback, due to the loop time constant, the

frame yoke current cannot be locked onto the

reference saw-tooth. Thus the output of amplifier

”A” will remain high and the thyristor is blocked.

The scanning current will begin flowing through

diode ”D”. As a consequence, the capacitor ”C”

starts charging up to the flyback voltage. The thyris-

tor is triggered as soon as the yoke current reaches

the maximum positive value.

EHT transformer winding (see Figure 88)

(for 90

o tube : Yoke ⇒ L = 120mH, rY =60Ω)

VIII.6 - Feed-back Circuit

VIII.6.1 - Frame power in quasi-bridge configu-

ration (see Figure 89)

This stage measures the frame scanning current in

differential mode and compares it to the reference

saw-tooth on Pin 3.

The overall configuration is built around two sym-

metrical networks :

-”R1,R2,R3” network : determines the dynamic

saw-tooth voltage

- ”R’1,R’2,R’3” network : sets the bias voltage and

the d.c. shift control.

A.C. gain : G =

VIN

⋅ α ⋅ RM

where :

-IY : Peak-to-peak Yoke Current

-VIN : Peak-to-peak saw-tooth voltage (Pin 3)

α ∈ [0,1] : amplitude adjustment

VIII.6.1.1 - Choice of ”R” value

The saw-tooth generator output is an emitter fol-

lower stage. Pin 3 output current must therefore be

always negative.

R<< R1

VIN(Min.)

VBIAS − VIN(Min.)

Where :

-VBIAS : Bias voltage for Pins 1 and 2

-VIN(MIN) : Saw-tooth voltage low level

Example :

- R1 = 22k

Ω

⇒ R ≈

-VBIAS =5V

-VIN(Min.) = 1.26V

VIII.6.1.2 - Influence of R3 value

R3 sets the bias voltage for Pins 1 and 2. This

voltage should be lower than 5.5V so as to enable

the frame to function upon initial start-up at

VCC =6V.

If the bias voltage is higher than this 5.5V level, the

d.c. open-loop gain will fall thereby rendering the

system more sensitive to d.c. drift.

Satisfactory results are obtained at VBIAS values

falling within 4V to 5V range.

R3 = R2

VBIAS

VB [VIN(MEAN) ⋅ G] − VBIAS [1 − G]

Where : VIN(MEAN) : saw-tooth mean value (Pin 3)

Capacitor ”C” connected between Pins 1 and 2

determines the system stability. Its value must be

appropriately calculated as a function of ”R1,R2

and R3” values so as to reject the line frequency

component.

VLF

Load

Yoke

DIODE

THYRISTOR

- VLF = 210VPP

- IYOKE = 380mAPP

- L = 500

µH

- C = 0.47

µF

- VLF

≈ 9.2 IY(PP) ⋅ rY

- Flyback duration = 1ms

Figure 88

TEA2028 - TEA2029 APPLICATION NOTE

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