AD5590BBCZ datasheet(5/44 Pages) AD

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AD5590

Rev. 0 | Page 5 of 44

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments2

LOGIC INPUTS

Input High Voltage, VINH

0.7 × VDRIVE

Input Low Voltage, VINL

0.3 × VDRIVE

Input Current, IIN

−1

μA

Typically 10 nA

Input Capacitance, CIN1, 4

LOGIC OUTPUTS

Output High Voltage, VOH

VDRIVE − 0.2

ISOURCE = 200 μA; VDD = 2.7 V to 5.25 V

Output Low Voltage, VOL

0.4

ISINK = 200 μA

Floating State Leakage Current

±10

μA

weak/TRI bit set to 0

Floating State Output Capacitance4

weak/TRI bit set to 0

Output Coding

Straight (Natural) Binary

coding bit set to 1

Twos Complement

coding bit set to 0

CONVERSION RATE4

Conversion Time

800

16 ASCLK cycles, ASCLK = 20 MHz

Track-and-Hold Acquisition Time3

300

Sine wave input

300

Full-scale step input

Throughput Rate

MSPS

@ 5 V (see the Serial Interface section)

POWER REQUIREMENTS

ADCVDD

2.7

5.25

VDRIVE

2.7

5.25

IDRIVE

0.15

μA

IDD5

Digital inputs = 0 V or VDRIVE

Normal Mode, Static

750

μA

VDD = 4.75 V to 5.25 V, ASCLK on or off

Normal Mode, Operational

(fS = Maximum Throughput)

2.5

VDD = 4.75 V to 5.25 V, fSCLK = 20 MHz

Autostandby Mode

1.55

fSAMPLE = 500 kSPS

100

μA

Static

Autoshutdown Mode

960

μA

fSAMPLE = 250 kSPS

0.5

μA

Static

Full Shutdown Mode

0.02

0.5

μA

ASCLK on or off

Power Dissipation

Normal Mode, Operational

12.5

ADCVDD = 5 V, fSCLK = 20 MHz

Autostandby Mode, Static

500

μW

ADCVDD = 5 V

Autoshutdown Mode, Static

2.5

μW

ADCVDD = 5 V

Full Shutdown Mode

2.5

μW

ADCVDD = 5 V

1 Specifications apply for fSCLK up to 20 MHz. For serial interfacing requirements, see the Timing Specifications section.

2 Temperature range: −40°C to +85°C.

3 See the Terminology section.

4 Guaranteed by design and characterization. Not production tested.

5 See the ADC Power vs. Throughput Rate section.

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