AD5752R datasheet(31/32 Pages) AD

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Preliminary Technical Data

AD5722R/AD5732R/AD5752R

Rev. PrC | Page 31 of 32

APPLICATIONS INFORMATION

+5V / ±5V OPERATION

When operating from a single +5V supply or a dual ±5V supply

an output range of +5V or ±5V is not achievable as sufficient

headroom for the output amplifier is not available. In this

situation a reduced reference voltage can be used, for instance a

2V reference voltage will produce an output range of +4V or

±4V, the 1v of headroom is more than rnough for full operation.

A standard value voltage reference of 2.048V can be used to

produce output ranges of +4.096V and ±4.096V. Refer to the

Typical Performance Characteristics plots for performance data

at a range of voltage reference values.

LAYOUT GUIDELINES

In any circuit where accuracy is important, careful considera-

tion of the power supply and ground return layout helps to

ensure the rated performance. The printed circuit board on

which the AD5722R/AD5732R/AD5752R are mounted should

be designed so that the analog and digital sections are separated

and confined to certain areas of the board. If the AD5722R/

AD5732R/AD5752R are in a system where multiple devices

require an AGND-to-DGND connection, the connection should

be made at one point only. The star ground point should be

established as close as possible to the device.

The AD5722R/AD5732R/AD5752R should have an ample supply

bypassing of a 10 µF capacitor in parallel with a 0.1 µF capacitor

on each supply located as close to the package as possible,

ideally right up against the device. The 10 µF capacitors are the

tantalum bead type. The 0.1 µF capacitor should have low

effective series resistance (ESR) and low effective series

inductance (ESI) such as the common ceramic types, which

provide a low impedance path to ground at high frequencies to

handle transient currents due to internal logic switching.

The power supply lines of the AD5722R/AD5732R/AD5752R

should use as large a trace as possible to provide low impedance

paths and reduce the effects of glitches on the power supply

line. Fast switching signals such as clocks should be shielded

with digital ground to avoid radiating noise to other parts of the

board and should never be run near the reference inputs. A

ground line routed between the SDIN and SCLK lines helps

reduce crosstalk between them (this is not required on a

multilayer board that has a separate ground plane, but separating

the lines does help). It is essential to minimize noise on the

REFIN line because it couples through to the DAC output.

Avoid crossover of digital and analog signals. Traces on

opposite sides of the board should run at right angles to each

other. This reduces the effects of feed through the board. A

microstrip technique is by far the best, but not always possible

with a double-sided board. In this technique, the component

side of the board is dedicated to ground plane, while signal

traces are placed on the solder side.

GALVANICALLY ISOLATED INTERFACE

In many process control applications, it is necessary to provide

an isolation barrier between the controller and the unit being

controlled to protect and isolate the controlling circuitry from

any hazardous common-mode voltages that may occur. The

iCoupler® family of products from Analog Devices provides

voltage isolation in excess of 2.5 kV. The serial loading structure

of the AD5722R/AD5732R/AD5752R make them ideal for

isolated interfaces because the number of interface lines is kept

to a minimum. Figure 47 shows a 4-channel isolated interface to

the AD5722R/AD5732R/AD5752R using an ADuM1400. For

further information, visit http://www.analog.com/icouplers.

ENCODE

DECODE

ENCODE

DECODE

ENCODE

DECODE

VIA

VIB

VIC

VID

VOA

VOB

VOC

VOD

ENCODE

DECODE

ADuM1400*

MICROCONTROLLER

SERIAL CLOCK OUT

SERIAL DATA OUT

SYNC OUT

CONTROL OUT

TO SCLK

TO SDIN

TO SYNC

TO LDAC

*ADDITIONAL PINS OMITTED FOR CLARITY.

Figure 47. Isolated Interface

MICROPROCESSOR INTERFACING

Microprocessor interfacing to the AD5722R/AD5732R/AD5752R

is via a serial bus that uses standard protocol compatible with

microcontrollers and DSP processors. The communications

channel is a 3-wire (minimum) interface consisting of a clock

signal, a data signal, and a synchronization signal. The

AD5722R/AD5732R/AD5752R require a 24-bit data-word with

data valid on the falling edge of SCLK.

For all interfaces, the DAC output update can be initiated

automatically when all the data is clocked in, or it can be

performed under the control of LDAC. The contents of the

registers can be read using the readback function.

AD5722R/AD5732R/AD5752R to Blackfin® DSP interface

Figure 48 shows how the AD5722R/AD5732R/AD5752R can be

interfaced to Analog Devices Blackfin DSP. The Blackfin has an

integrated SPI port that can be connected directly to the SPI

pins of the AD5722R/AD5732R/AD5752R and the programmable

I/O pins that can be used to set the state of a digital input such

as the LDAC pin.

SYNC

ADSP-BF531

AD5722R/

AD5732R/

AD5752R

SCLK

SDIN

SPISELx

SCK

MOSI

LDAC

PF10

Figure 48. AD5722R/AD5732R/AD5752R to Blackfin Interface

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