AD9714 datasheet(9/48 Pages) AD

9 / 48 page

AD9714/AD9715/AD9716/AD9717

Rev. 0 | Page 9 of 48

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

PIN 1

INDICATOR

DB11

DB10

DB9

DB8

DVDDIO

DVSS

DVDD

DB7

DB6

DB5

23 QOUTP

24 RLQP

25 AVSS

26 AVDD

27 RLIP

28 IOUTP

29 IOUTN

30 RLIN

22 QOUTN

21 RLQN

TOP VIEW

(Not to Scale)

AD9717

NOTES

1. THE HEAT SINK PAD IS CONNECTED TO AVSS AND

SHOULD BE SOLDERED TO THE GROUND PLANE.

EXPOSED METAL AT PACKAGE CORNERS IS

CONNECTED TO THIS PAD.

Figure 2. AD9717 Pin Configuration

Table 7. AD9717 Pin Function Descriptions

Pin No.

Mnemonic

Description

1 to 4

DB[11:8]

Digital Inputs.

DVDDIO

Digital I/O Supply Voltage (1.8 V to 3.3 V Nominal).

DVSS

Digital Common.

DVDD

Digital Core Supply Voltage (1.8 V). Provides a 1.8 V output when the internal LDO regulator is enabled.

8 to 14

DB[7:1]

Digital Inputs.

DB0 (LSB)

Digital Input (LSB).

DCLKIO

Data Input/Output Clock. Clock used to qualify input data.

CVDD

Sampling Clock Supply Voltage (1.8 V to 3.3 V). CVDD must be ≥ DVDD.

CLKIN

LVCMOS Sampling Clock Input.

CVSS

Sampling Clock Supply Voltage Common.

CMLQ

Q DAC Output Common-Mode Level.

RLQN

Load Resistor (500 Ω) to the CMLQ Pin.

QOUTN

Complementary Q DAC Current Output. Full-scale current is sourced when all data bits are 0s.

QOUTP

Q DAC Current Output. Full-scale current is sourced when all data bits are 1s.

RLQP

Load Resistor (500 Ω) to the CMLQ Pin.

AVSS

Analog Common.

AVDD

Analog Supply Voltage (1.8 V to 3.3 V).

RLIP

Load Resistor (500 Ω) to the CMLI Pin.

IOUTP

Complementary I DAC Current Output. Full-scale current is sourced when all data bits are 0s.

IOUTN

I DAC Current Output. Full-scale current is sourced when all data bits are 1s.

RLIN

Load Resistor (500 Ω) to the CMLI Pin.

CMLI

I DAC Output Common-Mode Level.

FSADJQ/AUXQ

Full-Scale Current Output Adjust for Q DAC. Connect to AVSS through a resistor.

Auxiliary Q DAC. The pin becomes the output of an optional, serial port driven, auxiliary DAC when the internal

on-chip, RSET, is enabled.

FSADJI/AUXI

Full-Scale Current Output Adjust for I DAC. Connect to AVSS through a resistor.

Auxiliary I DAC. The pin becomes the output of an optional, serial port driven, auxiliary DAC when the internal

on-chip, RSET, is enabled.

REFIO

Reference Input/Output. Serves as a reference input when the internal reference is disabled. Provides a 1.0 V

reference output when in internal reference mode (a 0.1 μF capacitor to AVSS is required).

AD9714 Datasheet(PDF) 9 Page - Analog Devices

AD9714 Datasheet(HTML) 9 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48

Datasheet Download

Link URL