PCA9543A_43B_43C_5

© NXP B.V. 2008. All rights reserved.

Product data sheet

Rev. 05 — 17 November 2008

10 of 23

NXP Semiconductors

PCA9543A/43B/43C

7.5 Bus transactions

Data is transmitted to the PCA9543A control register using the Write mode as shown in

Figure 13.

Data is read from PCA9543A using the Read mode as shown in Figure 14.

Fig 13. Write control register

Fig 14. Read control register

002aab182

XXXXXX

B1

B0

1

1

0

0

A1

A0

0

A

S

1

A

P

slave address

START condition

R/W

acknowledge

from slave

acknowledge

from slave

control register

SDA

STOP condition

002aab183

X

X

INT1 INT0

X

X

B1

B0

1

1

0

0

A1

A0

1

A

S

1

NA

P

slave address

START condition

R/W

acknowledge

from slave

no acknowledge

from master

control register

SDA

STOP condition

last byte