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AT90USB646 Datasheet(PDF) 260 Page - ATMEL Corporation

Part # AT90USB646
Description  8-bit Microcontroller with 64/128K Bytes of ISP Flash and USB Controller
PDF  459 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT90USB646 Datasheet(HTML) 260 Page - ATMEL Corporation

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7593H–AVR–11/08
ATmega32U6/AT90USB64/128
Figure 21-16. Plug-in Detection Input Block Diagram
The control logic of the VBUS pad outputs a signal regarding the VBUS voltage level :
• The “Session_valid” signal is active high when the voltage on the VBUS pad is higher or
equal to 1.4V. If lower than 1.4V, the signal is not active.
• The “Vbus_valid” signal is active high when the voltage on the VBUS pad is higher or equal
to 4.4V. If lower than 4.4V, the signal is not active.
• The VBUS status bit is set when VBUS is greater than “Vbus_valid”. The VBUS status bit is
cleared when VBUS falls below “Session_valid” (hysteresis behavior).
• The VBUSTI flag is set each time the VBUS bit state changes.
21.10.1
Peripheral mode
The USB peripheral cannot attach to the bus while VBUS bit is not set.
21.10.2
Host mode
The Host must use the UVCON pin to drive an external power switch or regulator that powers
the Vbus line. The UVCON pin is automatically asserted and set high by hardware when
UVCONE and VBUSREQ bits are set by firmware.
If a device connects (pull-up on DP or DM) within 300ms of Vbus delivery, the DCONNI flag will
rise. But, once VBUSREQ bit has been set, if no peripheral connection is detected within 300ms,
the BCERRI flag (and interrupt) will rise and Vbus delivery will be stopped (UVCON cleared).
If that behavior represents a limitation for the Host application, the following work-around may be
used :
1.
UVCONE and VBUSREQ must be cleared
2.
VBUSHWC must be set (to disable hardware control of UVCON pin)
3.
PORTE,7 pin (alternate function of UVCON pin) must be set by firmware
4.
a device connection will be detected thanks to the SRPI flag (that may usually be used
to detect a DP/DM pulse sent by an OTG B-Device that requests a new session)
21.11 ID detection
The ID pin transition is detected thanks to the following architecture:
VBUSTI
USBINT.0
VBUS
VBUS
USBSTA.0
VSS
VDD
Pad logic
Logic
Session_valid
VBus_pulsing
VBus_discharge
Vbus_valid



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