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AT90USB646 Datasheet(PDF) 264 Page - ATMEL Corporation |
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AT90USB646 Datasheet(HTML) 264 Page - ATMEL Corporation |
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264 / 459 page  264 7593H–AVR–11/08 ATmega32U6/AT90USB64/128 • 3 – SRPSEL: SRP Selection Bit Set to choose VBUS pulsing as SRP method. Clear to choose data line pulsing as SRP method. • 2 – VBUSHWC: VBus Hardware Control Bit Set to disable the hardware control over the UVCON pin. Clear to enable the hardware control over the UVCON pin. See for more details • 1 – VBUSREQ: VBUS Request Bit Set to assert the UVCON pin in order to enable the VBUS power supply generation. This bit shall be used when the controller is in the Host mode. Cleared by hardware when VBUSRQC is set. • 0 – VBUSRQC: VBUS Request Clear Bit Set to deassert the UVCON pin in order to enable the VBUS power supply generation. This bit shall be used when the controller is in the Host mode. Cleared by hardware immediately after the set. • 7 – Reserved This bit is reserved and always set. • 6-5 – PAGE: Timer page access Bit Set/clear to access a special timer register. See Section 21.9, page 259 for more details. • 4-3 - Reserved The value read from these bits is always 0. Do not set these bits. • 1-0 – VALUE: Value Bit Set to initialize the new value of the timer. See Section 21.9, page 259 for more details. • 7-6 - Reserved The value read from these bits is always 0. Do not set these bits. • 5 – STOE: Suspend Time-out Error Interrupt Enable Bit Set to enable the STOI interrupt. Clear to disable the STOI interrupt. Bit 7 6 5 4 3 2 1 0 -PAGE - - - VALUE OTGTCON Read/Write R R/W R/W R R R/W R/W R/W Initial Value 1 0 0 0 0 0 0 0 Bit 7 6 5 4 3 2 1 0 - - STOE HNPERRE ROLEEXE BCERRE VBERRE SRPE OTGIEN Read/Write R R R/W R/W R/W R/W R/W R/W Initial Value 0 0 0 0 0 0 0 0 |
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