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AT90USB646 Datasheet(PDF) 263 Page - ATMEL Corporation |
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AT90USB646 Datasheet(HTML) 263 Page - ATMEL Corporation |
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263 / 459 page ![]() 263 7593H–AVR–11/08 ATmega32U6/AT90USB64/128 Set by hardware when the controller is in FULL-SPEED mode. Cleared by hardware when the controller is in LOW-SPEED mode. • 2 – Reserved The value read from this bit is always 0. Do not set this bit. • 1 – ID: IUD pin Flag The value read from this bit indicates the state of the UID pin. • 0 – VBUS: VBus Flag The value read from this bit indicates the state of the VBUS pin. This bit can be used in device mode to monitor the USB bus connection state of the appication. See Section 21.10, page 259 for more details. 7-2 - Reserved The value read from these bits is always 0. Do not set these bits. 1 – IDTI: D Transition Interrupt Flag Set by hardware when a transition (high to low, low to high) has been detected on the UID pin. Shall be cleared by software. • 0 – VBUSTI: IVBUS Transition Interrupt Flag Set by hardware when a transition (high to low, low to high) has been detected on the VBUS pad. Shall be cleared by software. • 7-6 - Reserved The value read from these bits is always 0. Do not set these bits. • 5 – HNPREQ: HNP Request Bit Set to initiate the HNP when the controller is in the Device mode (B). Set to accept the HNP when the controller is in the Host mode (A). Clear otherwise. • 4 – SRPREQ: SRP Request Bit Set to initiate the SRP when the controller is in Device mode. Cleared by hardware when the controller is initiating a SRP. Bit 7 65 43 21 0 - - - - - - IDTI VBUSTI USBINT Read/Write R R R R R R R/W R/W Initial Value 0 0 0 0 0 0 0 0 Bit 7 6 5 4 3 2 1 0 - - HNPREQ SRPREQ SRPSEL VBUSHWC VBUSREQ VBUSRQC OTGCON Read/Write R R R/W R/W R/W R/W R/W R/W Initial Value 0 0 0 0 0 0 0 0 |
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