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LT3510

3510fc

Figure 8. Undervoltage Lockout

If the synchronization signal powers up in a high impedance

state (Hi-Z), connect a resistor from the RT/SYNC pin to

ground. The equivalent resistance seen from the RT/SYNC

pin to ground will set the start-up frequency.

If the synchronization signal changes between high and

low impedance states during power up (VOL,Hi-Z),connect

the synchronization circuitry to the LT3510 as shown in

the Typical Applications section. This will allow the LT3510

to start-up with a switching frequency determined by the

equivalent resistance from the RT/SYNC pin to ground.

Shutdown and Undervoltage Lockout

Figure 8 shows how to add undervoltage lockout (UVLO)

to the LT3510. Typically, UVLO is used in situations where

the input supply is current limited, or has a relatively high

source resistance. A switching regulator draws constant

power from the source, so source current increases as

source voltage drops. This looks like a negative resistance

load to the source and can cause the source to current limit

or latch low under low source voltage conditions. UVLO

prevents the regulator from operating at source voltages

where these problems might occur.

An internal comparator will force the part into shutdown

below the minimum VIN1 of 2.8V. This feature can be

used to prevent excessive discharge of battery-operated

systems.

Since VIN2 supplies the output stage of channel 2 and is

not monitored, care must be taken to insure that VIN2 is

present before channel 2 is allowed to switch.

If an adjustable UVLO threshold is required, the SHDN

pin can be used. The threshold voltage of the SHDN

pin comparator is 1.28V. A 3μA internal current source

defaults the open-pin condition to be operating (see Typical

Performance Characteristics). Current hysteresis is added

above the SHDN threshold. This can be used to set voltage

hysteresis of the UVLO using the following:

128

–

–.

VH = Turn-on threshold

VL = Turn-off threshold

Example: switching should not start until the input is above

4.75V and is to stop if the input falls below 3.75V.

VH = 4.75V

VL = 3.75V

475 3 75

143

128

475 1 28

143

=≅

.– .

μAA

≅ 47

Keep the connections from the resistors to the SHDN

pin short and make sure that the interplane or surface

capacitance to switching nodes is minimized. If high re-

sistor values are used, the SHDN pin should be bypassed

with a 1nF capacitor to prevent coupling problems from

the switch node.

Soft-Start

The output of the LT3510 regulates to the lowest voltage

present at either the SS pin or an internal 0.8V reference.

A capacitor from the SS pin to ground is charged by an

internal 3.25μA current source resulting in a linear output

ramp from 0V to the regulated output whose duration is

given by:

RAMP

•.

325

1.28V

7μA

3μA

SHDN

INTERNAL

REGULATOR

VIN1

VIN1 > 2.8V

3510 F08

VIN1 OR VIN2

LT3510

APPLICATIONS INFORMATION

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