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LTC4444

4444f

APPLICATIONS INFORMATION

Power Dissipation

To ensure proper operation and long-term reliability, the

LTC4444 must not operate beyond its maximum tem-

perature rating. Package junction temperature can be

calculated by:

TJ = TA + PD (θJA)

where:

TJ = Junction temperature

TA = Ambient temperature

PD = Power dissipation

θJA = Junction-to-ambient thermal resistance

Power dissipation consists of standby and switching

power losses:

PD = PDC + PAC + PQG

where:

PDC = Quiescent power loss

PAC = Internal switching loss at input frequency, fIN

PQG = Loss due turning on and off the external MOSFET

with gate charge QG at frequency fIN

The LTC4444 consumes very little quiescent current. The

DC power loss at VCC = 12V and VBOOST-TS = 12V is only

(350μA)(12V) = 4.2mW.

At a particular switching frequency, the internal power loss

increases due to both AC currents required to charge and

discharge internal node capacitances and cross-conduc-

tion currents in the internal logic gates. The sum of the

quiescent current and internal switching current with no

load are shown in the Typical Performance Characteristics

plot of Switching Supply Current vs Input Frequency.

The gate charge losses are primarily due to the large AC

currents required to charge and discharge the capacitance

of the external MOSFETs during switching. For identical

pure capacitive loads CLOAD on TG and BG at switching

frequency fIN, the load losses would be:

PCLOAD = (CLOAD)(f)[(VBOOST-TS)2 + (VCC)2]

In a typical synchronous buck conﬁguration, VBOOST-TS

is equal to VCC – VD, where VD is the forward voltage

drop across the diode between VCC and BOOST. If this

drop is small relative to VCC, the load losses can be

approximated as:

PCLOAD = 2(CLOAD)(fIN)(VCC)2

Unlike a pure capacitive load, a power MOSFET’s gate

capacitance seen by the driver output varies with its VGS

voltage level during switching. A MOSFET’s capacitive load

power dissipation can be calculated using its gate charge,

QG. The QG value corresponding to the MOSFET’s VGS

value (VCC in this case) can be readily obtained from the

manufacturer’s QG vs VGS curves. For identical MOSFETs

on TG and BG:

PQG = 2(VCC)(QG)(fIN)

To avoid damage due to power dissipation, the LTC4444

includes a temperature monitor that will pull BG and TG

low if the junction temperature rises above 160°C. Normal

operation will resume when the junction temperature cools

to less than 135°C.

Bypassing and Grounding

The LTC4444 requires proper bypassing on the VCC

and VBOOST-TS supplies due to its high speed switching

(nanoseconds) and large AC currents (Amperes). Careless

component placement and PCB trace routing may cause

excessive ringing.

To obtain the optimum performance from the LTC4444:

A. Mount the bypass capacitors as close as possible

between the VCC and GND pins and the BOOST and

TS pins. The leads should be shortened as much as

possible to reduce lead inductance.

B. Use a low inductance, low impedance ground plane

to reduce any ground drop and stray capacitance.

Remember that the LTC4444 switches greater than

3A peak currents and any signiﬁcant ground drop will

degrade signal integrity.

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