LTC2497 datasheet(14/28 Pages) LINER

14 / 28 page

LTC2497

2497f

The LTC2497 has two registers. The output register (24

bits long) contains the last conversion result. The input

DATA OUTPUT FORMAT

The output register contains the last conversion result.

After each conversion is completed, the device automati-

cally enters the sleep state where the supply current is

reduced to 1µA. When the LTC2497 is addressed for a read

operation, it acknowledges (by pulling SDA low) and acts

as a transmitter. The master/receiver can read up to three

bytes from the LTC2497. After a complete read operation

(3 bytes), a new conversion is initiated. The device will

NAK subsequent read operations while a conversion is

being performed.

The data output stream is 24 bits long and is shifted out

on the falling edges of SCL (see Figure 3a). The ﬁrst bit

is the conversion result sign bit (SIG) (see Tables 1 and

2). This bit is high if VIN ≥ 0 and low if VIN < 0 (where VIN

corresponds to the selected input signal IN+ – IN–). The

second bit is the most signiﬁcant bit (MSB) of the result.

The ﬁrst two bits (SIG and MSB) can be used to indicate

over and under range conditions (see Table 2). If both bits

Table 1. Output Data Format

Differential Input Voltage

VIN*

Bit 23

SIG

Bit 22

MSB

Bit 21

Bit 20

Bit 19

…

Bit 6

LSB

Bits 5-0

Always 0

VIN* ≥ FS**

…

000000

FS** – 1LSB

…

000000

0.5 • FS**

…

000000

0.5 • FS** – 1LSB

…

000000

…

000000

–1LSB

…

000000

–0.5 • FS**

…

000000

–0.5 • FS** – 1LSB

…

000000

–FS**

…

000000

VIN* < –FS**

…

000000

*The differential input voltage VIN = IN

+ – IN–. **The full-scale voltage FS = 0.5 • VREF.

are HIGH, the differential input voltage is equal to or above

+FS. If both bits are set low, the input voltage is below

–FS. The function of these bits is summarized in Table

2. The 16 bits following the MSB bit are the conversion

result in binary two’s complement format. The remaining

six bits are always 0.

As long as the voltage on the selected input channels (IN+

and IN–) remains between –0.3V and VCC + 0.3V (absolute

maximum operating range) a conversion result is gener-

ated for any differential input voltage VIN from –FS = –0.5

• VREF to +FS = 0.5 • VREF. For differential input voltages

greater than +FS, the conversion result is clamped to the

value corresponding to +FS. For differential input voltages

below –FS, the conversion result is clamped to the value

–FS – 1LSB.

Table 2. LTC2497 Status Bits

Input Range

Bit 23

SIG

Bit 22

MSB

VIN ≥ FS

0V ≤ VIN < FS

–FS ≤ VIN < 0V

VIN < –FS

APPLICATIONS INFORMATION

LTC2497 Datasheet(PDF) 14 Page - Linear Technology

LTC2497 Datasheet(HTML) 14 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

Datasheet Download

Link URL