LTC3441 datasheet(5/16 Pages) LINER

5 / 16 page

LTC3441

3441fa

TYPICAL PERFOR A CE CHARACTERISTICS

PMOS RDS(ON)

Minimum Start Voltage

TEMPERATURE (

°C)

–50

0.05

0.07

0.09

0.11

–25

3441 G15

0.13

0.15

0.06

0.08

0.10

0.12

0.14

125

VIN = VOUT = 3.6V

SWITCHES A AND D

TEMPERATURE (

°C)

–55

2.10

2.15

2.20

2.25

2.30

–25

3441 G16

125

PI FU CTIO S

SHDN/SS (Pin 1): Combined Soft-Start and Shutdown.

Applied voltage < 0.4V shuts down the IC. Tie to >1.4V to

enable the IC and >2.4V to ensure the error amp is not

clamped from soft-start. An RC from the shutdown com-

mand signal to this pin will provide a soft-start function by

limiting the rise time of the VC pin.

GND (Pin 2): Signal Ground for the IC.

PGND (Pins 3, 6, 13 Exposed Pad): Power Ground for the

Internal NMOS Power Switches

SW1 (Pin 4): Switch pin where the internal switches A and

B are connected. Connect inductor from SW1 to SW2. An

optional Schottky diode can be connected from this SW1

to ground. Minimize trace length to keep EMI down.

SW2 (Pin 5): Switch pin where the internal switches C

and D are connected. An optional Schottky diode can be

connected from SW2 to VOUT (it is required where

VOUT > 4.3V). Minimize trace length to keep EMI down.

MODE/SYNC (Pin 7): Burst Mode Select and Oscillator

Synchronization.

MODE/SYNC = High: Enable Burst Mode Operation.

During the period where the IC is supplying energy to

the output, the inductor peak inductor current will reach

0.8A and return to zero current on each cycle. In Burst

Mode operation the operation is variable frequency,

which provides a significant efficiency improvement at

light loads. The Burst Mode operation will continue until

the pin is driven low.

MODE/SYNC = Low: Disable Burst Mode operation and

maintain low noise, constant frequency operation .

MODE/SYNC = External CLK : Synchronization of the

internal oscillator and Burst Mode operation disable. A

clock pulse width between 100ns and 2

μs and a clock

frequency between 2.3MHz and 3.4MHz (twice the

desired frequency) is required to synchronize the IC.

fOSC = fSYNC/2

VOUT (Pin 8): Output of the Synchronous Rectifier. A filter

capacitor is placed from VOUT to GND. A ceramic bypass

capacitor is recommended as close to the VOUT and GND

pins as possible.

PVIN (Pin 9): Power VIN Supply Pin. A 10μF ceramic capaci-

tor is recommended as close to the PVIN and PGND pins

as possible

VIN (Pin 10): Input Supply Pin. Internal VCC for the IC.

VC (Pin 11): Error Amp Output. A frequency compensation

network is connected from this pin to the FB pin to

compensate the loop. See the section “Compensating the

Feedback Loop” for guidelines.

FB (Pin 12): Feedback Pin. Connect resistor divider tap

here. The output voltage can be adjusted from 2.4V to

5.25V. The feedback reference voltage is typically 1.22V.

NMOS RDS(ON)

TEMPERATURE (

°C)

–55

0.05

0.07

0.09

0.11

0.13

0.15

–25

535

3441 G14

125

VIN = VOUT = 3.6V

SWITCHES B AND C

LTC3441 Datasheet(PDF) 5 Page - Linear Technology

LTC3441 Datasheet(HTML) 5 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

Datasheet Download

Link URL