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LTC4090/LTC4090-5

4090fa

OPERATION

USB Input Current Limit

The input current limit and charge control circuits of the

LTC4090/LTC4090-5 are designed to limit input current as

well as control battery charge current as a function of IOUT.

OUT drives the external load and the battery charger.

If the combined load at OUT does not exceed the pro-

grammed input current limit, OUT will be connected to IN

through an internal 215m

Ω P-channel MOSFET.

If the combined load at OUT exceeds the programmed input

current limit, the battery charger will reduce its charge cur-

rent by the amount necessary to enable the external load

to be satisﬁed while maintaining the programmed input

current. Even if the battery charge current is set to exceed

the allowable USB current, a correctly programmed input

current limit will ensure that the USB speciﬁcation is never

violated. Furthermore, load current at OUT will always be

prioritized and only excess available current will be used

to charge the battery.

The input current limit, ICL, can be programmed using the

following formula:

CLPROG

⎛

⎝⎜

⎞

⎠⎟

1000

•

where VCLPROG is the CLPROG pin voltage (typically 1V)

and RCLPROG is the total resistance from the CLPROG pin

to ground. For best stability over temperature and time,

1% metal ﬁlm resistors are recommended.

The programmed battery charge current, ICHG, is deﬁned

as:

CHG

PROG

⎛

⎝⎜

⎞

⎠⎟

50 000

•

Input current, IIN, is equal to the sum of the BAT pin output

current and the OUT pin output current. VCLPROG will track

the input current according to the following equation:

OUT

BAT

CLPROG

• 1000

In USB applications, the maximum value for RCLPROG

should be 2.1k. This will prevent the input current from

exceeding 500mA due to LTC4090/LTC4090-5 tolerances

and quiescent currents. A 2.1k CLPROG resistor will give a

typical current limit of 476mA in high power mode (when

HPWR is high) or 95mA in low power mode (when HPWR

is low).

When SUSP is driven to a logic high, the input power

path is disabled and the ideal diode from BAT to OUT will

supply power to the application.

High Voltage Step Down Regulator

The power delivered from HVIN to HVOUT is controlled by

a constant frequency, current mode step down regulator.

An external P-channel MOSFET directs this power to OUT

and prevents reverse conduction from OUT to HVOUT (and

ultimately HVIN).

An oscillator, with frequency set by RT, enables an RS ﬂip-

ﬂop, turning on the internal power switch. An ampliﬁer and

comparator monitor the current ﬂowing between HVIN and

SW pins, turning the switch off when this current reaches

a level determined by the voltage at VC. An error ampliﬁer

servos the VC node to maintain approximately 300mV

between OUT and BAT (LTC4090). By keeping the voltage

across the battery charger low, efﬁciency is optimized be-

cause power lost to the battery charger is minimized and

power available to the external load is maximized. If the

BAT pin voltage is less than approximately 3.3V, then the

error ampliﬁer will servo the VC node to provide a constant

HVOUT output voltage of about 3.6V (LTC4090). An active

clamp on the VC node provides current limit. The VC node

is also clamped to the voltage on the HVEN pin; soft-start

is implemented by generating a voltage ramp at the HVEN

pin using an external resistor and capacitor.

The switch driver operates from either the high voltage

input or from the BOOST pin. An external capacitor and

internal diode are used to generate a voltage at the BOOST

pin that is higher than the input supply. This allows the

driver to fully saturate the internal bipolar NPN power

switch for efﬁcient operation.

To further optimize efﬁciency, the high voltage buck regu-

lator automatically switches to Burst Mode® operation in

light load situations. Between bursts, all circuitry associated

with controlling the output switch is shut down reducing

the input supply current.

LTC4090 Datasheet(PDF) 13 Page - Linear Technology

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