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BQ2018TS Datasheet(PDF) 1 Page - Texas Instruments |
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BQ2018TS Datasheet(HTML) 1 Page - Texas Instruments |
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1 / 21 page  1 Features ® Multifunction charge/discharge counter ® Resolves signals less than 12.5 µV ® Internal offset calibration im- proves accuracy ® 1024 bits of NVRAM configured as 128x8 ® Internal temperature sensor for self-discharge estimation ® Single-wire serial interface ® Dual operating modes: - Operating: <80µA - Sleep: <10µA ® REG output for low-cost mi- croregulation ® Internal timebase eliminates ex- ternal components ® 8-pin TSSOP or SOIC allows bat- tery pack integration General Description The bq2018 is a low-cost charge/dis- charge counter peripheral packaged in an 8-pin TSSOP or SOIC. It works with an intelligent host controller, pro- viding state-of-charge information for rechargeable batteries. The bq2018 measures the voltage drop across a low-value series sense resistor between the negative termi- nal of the battery and the battery pack ground contact. By using the ac- cumulated counts in the charge, discharge, and self-discharge regis- ters, an intelligent host controller can determine battery state-of-charge in- formation. To improve accuracy, an offset count register is available. The system host controller is responsible for the register maintenance by reset- ting the charge in/out and self- discharge registers as needed. The bq2018 also features 128 bytes of NVRAM registers. The upper 13 bytes of NVRAM contain the capac- ity monitoring and status informa- tion. The RBI input operates from an external power storage source such as a capacitor or a series cell in the battery pack, providing register nonvolatility for periods when the battery is shorted to ground or when the battery charge state is not suffi- cient to operate the bq2018. During this mode, the register backup cur- rent is less than 100nA. Packaged in an 8-pin TSSOP or SOIC, the bq2018 is small enough to fit in the crevice between two A- size cells or within the width of a prismatic cell. REG Regulator output VCC Supply voltage input VSS Ground HDQ Data input/output 1 PN-201801.eps 8-Pin TSSOP or Narrow SOIC 2 3 4 8 7 6 5 REG VCC VSS HDQ WAKE SR1 SR2 RBI WAKE Wake-up output SR1 Current sense input 1 SR2 Current sense input 2 RBI Register backup input Pin Connections Pin Names bq2018 Power Minder™ IC SLUS003–JUNE 1999 C |
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