HC1S40 datasheet(21/110 Pages) ALTERA

21 / 110 page

Altera Corporation

3–3

September 2008

Preliminary

IEEE Std. 1149.1 (JTAG) Boundary-Scan Support

Figure 3–1 shows the timing requirements for the JTAG signals.

Figure 3–1. HardCopy Stratix JTAG Waveforms

Table 3–3. 32-Bit HardCopy Stratix Device IDCODE

Device

IDCODE (32 Bits) (1)

Version

(4 Bits)

Part Number

(16 Bits)

Manufacturer Identity

(11 Bits)

LSB

(1 Bit) (2)

HC1S25

0000

0010 0000 0000 0011

000 0110 1110

HC1S30

0000

0010 0000 0000 0100

000 0110 1110

HC1S40

0000

0010 0000 0000 0101

000 0110 1110

HC1S60

0000

0010 0000 0000 0110

000 0110 1110

HC1S80

0000

0010 0000 0000 0111

000 0110 1110

Notes to Table 3–3:

(1)

The most significant bit (MSB) is on the left.

(2)

The

IDCODE’s least significant bit (LSB) is always 1.

TDO

TCK

tJPZX

JPCO

tJPH

t JPXZ

tJCP

tJPSU

t JCL

tJCH

TDI

TMS

Signal

to Be

Captured

Signal

to Be

Driven

JSZX

tJSSU

tJSH

JSCO

tJSXZ

HC1S40 Datasheet(PDF) 21 Page - Altera Corporation

HC1S40 Datasheet(HTML) 21 Page - Altera Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL