SN54ACT8997, SN74ACT8997

SCAN-PATH LINKERS WITH 4-BIT IDENTIFICATION BUSES

SCAN-CONTROLLED IEEE STD 1149.1 (JTAG) TAP CONCATENATORS

SCAS157D – APRIL 1990 – REVISED DECEMBER 1996

5

POST OFFICE BOX 655303

state diagram description

The TAP proceeds through the states in Figure 1 according to IEEE Standard 1149.1. There are six stable states

(indicated by a looping arrow) and ten unstable states in the diagram. A stable state is a state the TAP can retain

for consecutive TCK cycles. Any state that does not meet this criterion is an unstable state.

There are two main paths through the state diagram: one to manipulate a data register and one to manipulate

the instruction register. No more than one register can be manipulated at a time.

Run-Test /Idle

TMS = L

Test-Logic-Reset

Select-DR-Scan

Select-IR-Scan

Capture-DR

Shift-DR

Exit1-DR

Pause-DR

Exit2-DR

Update-DR

Capture-IR

Shift-IR

Exit1-IR

Pause-IR

Exit2-IR

Update-IR

TMS = H

TMS = L

TMS = H

TMS = H

TMS = L

TMS = L

TMS = L

TMS = L

TMS = H

TMS = H

TMS = L

TMS = L

TMS = H

TMS = H

TMS = H

TMS = H

TMS = H

TMS = H

TMS = L

TMS = L

TMS = H

TMS = H

TMS = H

TMS = L

TMS = L

TMS = H

TMS = H

TMS = L

TMS = L

TMS = L

TMS = L

Figure 1. TAP-Controller State Diagram