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IMP5225 Datasheet(PDF) 1 Page - A1 PROs co., Ltd.

Part # IMP5225
Description  18--Liine Pllug and Pllay SCSII Termiinattor
PDF  6 Pages
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Manufacturer  A1PROS [A1 PROs co., Ltd.]
Direct Link  http://www.a1pros.co.kr
Logo A1PROS - A1 PROs co., Ltd.

IMP5225 Datasheet(HTML) 1 Page - A1 PROs co., Ltd.

  IMP5225 Datasheet HTML 1Page - A1 PROs co., Ltd. IMP5225 Datasheet HTML 2Page - A1 PROs co., Ltd. IMP5225 Datasheet HTML 3Page - A1 PROs co., Ltd. IMP5225 Datasheet HTML 4Page - A1 PROs co., Ltd. IMP5225 Datasheet HTML 5Page - A1 PROs co., Ltd. IMP5225 Datasheet HTML 6Page - A1 PROs co., Ltd.  
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Key Features
x
SCSI Plug and Play
— Dual active LOW disconnect pins
x
Ultra-Fast response for Fast-20 SCSI
x
35MHz channel bandwidth
x
Sleep-mode current less than 150µA
— Disconnects terminator from lows
x
NO external compensation capacitors
x
Compatible with active negation drivers
x
Compatible with passive and active terminations
x
Approved for use with SCSI 1, 2, 3 and
Ultra SCSI
x
Hot swap compatible
x
Pin-for-pin compatible with LX5225, LX5205
and UC5607
Block Diagrams
–
+
Enable
Logic
Current
Biasing
Circuit
24mA Current
Limiting Circuit
Term Power
DATA OUTPUT
PIN DB (0)
1 of 18 Channels
DISCONNECT 1
VTERM
VTERM
DISCONNECT 2
0.4V
2.85V
5225_01.eps
1
18-Line Plug and Pla
8-Line Plug and Playy
SCSI T
SCSI Ter
erminat
minator
or
The IMP5225 SCSI terminator is part of IMP's family of high-
performance SCSI terminators, which are designed to deliver true
UltraSCSI performance. The BiCMOS design offers superior perfor-
mance over first generation linear passive and active techniques. IMP's
new architecture employs high-speed adaptive elements for each chan-
nel, thereby providing the fastest response possible — typically 35MHz,
which is 100 times faster than the older linear regulator/terminator
approach. Products using the older regulator/resistor architecture have
bandwidths which are dominated by the reference stabilization output
capacitor and are therefore limited to 500kHz (see further discussion
in the Functional Description section). The IMP architecture eliminates
the output compensation capacitor required in linear regulator/
resistor designs.
The IMP5225 architecture tolerates marginal system designs. A key
improvement offered by the IMP5225 lies in its ability to insure reliable,
error-free communications even in systems which do not adhere to
recommended SCSI hardware design guidelines, such as the use of
improper cable lengths and impedances. Frequently, this situation is not
controlled by the peripheral or host designer.
The IMP5225 has two disconnect pins for SCSI Plug and Play (PnP)
applications. To enter the disconnect mode, the disconnect pins must be
driven LOW thereby disconnecting the IMP5225 from the SCSI bus.
Quiescent current is less than 150
µA when disabled.
Reduced component count is inherent in the IMP5225 architecture.
Traditional termination techniques require large stabilization and
transient protection capacitors of up to 20
µF in value and
size. The IMP5225 architecture does not require these com-
ponents, allowing all the cost savings associated with
inventory, board space, assembly, reliability, and compo-
nent costs.
The IMP5225 is a superior pin-for-pin replacement for the
LX5225, LX5205, UC5607.
1
© 2000 IMP, Inc.
408-432-9100/www.impweb.com
1
IMP5225
IMP5225
DATA COMMUNICATIONS


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