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TMS320UC5409 Datasheet(PDF) 16 Page - Texas Instruments |
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TMS320UC5409 Datasheet(HTML) 16 Page - Texas Instruments |
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16 / 74 page ![]() TMS320UC5409 FIXED-POINT DIGITAL SIGNAL PROCESSOR SPRS101A – APRIL 1999 – REVISED AUGUST 1999 16 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 parallel I/O ports The ’UC5409 has a total of 64K I/O ports. These ports can be addressed by the PORTR instruction or the PORTW instruction. The IS signal indicates a read/write operation through an I/O port. The ’UC5409 can interface easily with external devices through the I/O ports while requiring minimal off-chip address-decoding circuits. enhanced 8-bit host-port interface (HPI8/16) The ’UC5409 host-port interface, also referred to as the HPI8/16, is an enhanced version of the standard 8-bit HPI found on earlier ’54x DSPs (’542, ’545, ’548, and ’549). The HPI8/16 is an 8-bit parallel port for interprocessor communication. The features of the HPI8/16 include: Standard features: D Sequential transfers (with autoincrement) or random-access transfers D Host interrupt and ’54x interrupt capability D Multiple data strobes and control pins for interface flexibility Enhanced features of the ’UC5409 HPI8/16: D Access to entire on-chip RAM through DMA bus D Capability to continue transferring during emulation stop D Capability to transfer 16-bit address and 16-bit data (non-multiplexed mode) The HPI8/16 functions as a slave and enables the host processor to access the on-chip memory of the ’UC5409. A major enhancement to the ’UC5409 HPI over previous versions is that it allows host access to the entire on-chip memory range of the DSP. The HPI8/16 does not have access to external memory. The host and the DSP both have access to the on-chip RAM at all times and host accesses are always synchronized to the DSP clock. If the host and the DSP contend for access to the same location, the host has priority, and the DSP waits for one HPI8/16 cycle. Note that since host accesses are always synchronized to the ’UC5409 clock, an active input clock (CLKIN) is required for HPI8/16 accesses during IDLE states, and host accesses are not allowed while the ’UC5409 reset pin is asserted. In standard 8-bit mode, the HPI8/16 interface consists of an 8-bit bidirectional data bus and various control signals. Sixteen-bit transfers are accomplished in two parts with the HBIL input designating high or low byte. The host communicates with the HPI8/16 through three dedicated registers — HPI address register (HPIA), HPI data register (HPID), and an HPI control register (HPIC). The HPIA and HPID registers are only accessible by the host, and the HPIC register is accessible by both the host and the ’UC5409. In 16-bit nonmultiplexed mode (HPI16=1), the HPI8/16 can read and write to internal memory via the external address and data pins, A0 – A15 and D0–D15, respectively. HD0–HD7 can be configured as general-purpose input/output (GPIO). The HPI16 non-multiplexed mode does not support the use of the HPID and HPIA registers. Host-to-DSP and DSP-to-host interrupts are also not supported. See Figure 6 for the HPI memory map. |
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