TPS70745, TPS70748, TPS70751, TPS70758, TPS70702

DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS

WITH POWER UP SEQUENCING FOR SPLIT VOLTAGE DSP SYSTEMS

SLVS291 – MAY 2000

26

POST OFFICE BOX 655303

APPLICATION INFORMATION

split voltage DSP application

Figure 41 shows a typical application where the TPS70751 is powering up a DSP. In this application by grounding

1.8 V

VIN1

VIN2

EN

SEQ

VOUT1

VSENSE1

PG1

MR2

RESET

MR1

VSENSE2

VOUT2

TPS70751 PWP

5 V

3.3 V

I/O

MR1

Core

0.1

µF

RESET

10

µF

10

µF

0.1

µF

DSP

MR2

PG1

EN

250 k

Ω

>2 V

<0.7 V

250 k

Ω

>2 V

<0.7 V

>2 V

<0.7 V

83%

95%

120 ms

EN

VOUT2

(Core)

PG1

RESET

SEQ

95%

83%

VOUT1

(I/O)

NOTE A: t1 – Time at which both VOUT1 and VOUT2 are greater than the PG thresholds and MR1 is logic high.

t1

(see Note A)

Figure 41. Application Timing Diagram (SEQ = Low)