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TMS320C6711FD167 Datasheet(PDF) 52 Page - Texas Instruments

Part # TMS320C6711FD167
Description  FIXED-POINT DIGITAL SIGNAL PROCESSORS
PDF  87 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TMS320C6711FD167 Datasheet(HTML) 52 Page - Texas Instruments

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TMS320C6211, TMS320C6211B
FIXEDPOINT DIGITAL SIGNAL PROCESSORS
SPRS073L − AUGUST 1998 − REVISED JUNE 2005
52
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251−1443
SYNCHRONOUS-BURST MEMORY TIMING
timing requirements for synchronous-burst SRAM cycles† (see Figure 20)
NO.
C6211−150
C6211−167
C6211BGFNA−150
C6211B−150
C6211B−167
UNIT
NO.
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
6
tsu(EDV-EKOH)
Setup time, read EDx valid before
ECLKOUT high
2.5
2.5
2.5
ns
7
th(EKOH-EDV)
Hold time, read EDx valid after
ECLKOUT high
1
2.5
2
ns
† The C6211/C6211B SBSRAM interface takes advantage of the internal burst counter in the SBSRAM. Accesses default to incrementing 4-word
bursts, but random bursts and decrementing bursts are done by interrupting bursts in progress. All burst types can sustain continuous data flow.
switching characteristics over recommended operating conditions for synchronous-burst SRAM
cycles†‡ (see Figure 20 and Figure 21)
NO.
PARAMETER
C6211−150
C6211−167
C6211BGFNA−150
C6211B−150
C6211B−167
UNIT
NO.
PARAMETER
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
1
td(EKOH-CEV)
Delay time, ECLKOUT high to CEx
valid
1.5
6.5
1
6.5
1.2
6.5
ns
2
td(EKOH-BEV)
Delay time, ECLKOUT high to BEx
valid
6.5
6.5
6.5
ns
3
td(EKOH-BEIV)
Delay time, ECLKOUT high to BEx
invalid
1.5
1
1.2
ns
4
td(EKOH-EAV)
Delay time, ECLKOUT high to EAx
valid
6.5
6.5
6.5
ns
5
td(EKOH-EAIV)
Delay time, ECLKOUT high to EAx
invalid
1.5
1
1.2
ns
8
td(EKOH-ADSV)
Delay time, ECLKOUT high to
ARE/SDCAS/SSADS valid
1.5
6.5
1
6.5
1.2
6.5
ns
9
td(EKOH-OEV)
Delay time, ECLKOUT high to
AOE/SDRAS/SSOE valid
1.5
6.5
1
6.5
1.2
6.5
ns
10
td(EKOH-EDV)
Delay time, ECLKOUT high to EDx
valid
7
7
7
ns
11
td(EKOH-EDIV)
Delay time, ECLKOUT high to EDx
invalid
1.5
1
1.2
ns
12
td(EKOH-WEV)
Delay time, ECLKOUT high to
AWE/SDWE/SSWE valid
1.5
6.5
1
6.5
1.2
6.5
ns
† The C6211/C6211B SBSRAM interface takes advantage of the internal burst counter in the SBSRAM. Accesses default to incrementing 4-word
bursts, but random bursts and decrementing bursts are done by interrupting bursts in progress. All burst types can sustain continuous data flow.
‡ ARE/SDCAS/SSADS, AOE/SDRAS/SSOE, and AWE/SDWE/SSWE operate as SSADS, SSOE, and SSWE, respectively, during SBSRAM
accesses.



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