PCF8579 datasheet(20/41 Pages) NXP

20 / 41 page

PCF8579_5

Product data sheet

Rev. 05 — 11 May 2009

20 of 41

NXP Semiconductors

PCF8579

LCD column driver for dot matrix graphic displays

8.9 RAM access

There are three RAM-access modes:

• Character

• Half-graphic

• Full-graphic

These modes are speciﬁed by the bits G[1:0] of the RAM-access command. The

RAM-access command controls the order in which data is written to or read from the RAM

(see Figure 17).

To store RAM data, the user speciﬁes the location into which the ﬁrst byte will be loaded

(see Figure 16):

• Device subaddress (speciﬁed by the device-select command)

• RAM X-address (speciﬁed by the bits X[5:0] of the load-X-address command)

• RAM bank (speciﬁed by the bits Y[1:0] of the RAM-access command)

Subsequent data bytes will be written or read according to the chosen RAM-access mode.

Device subaddresses are automatically incremented between devices until the last device

is reached. If the last device has subaddress 15, further display data transfers will lead to

a wrap-around of the subaddress to 0.

Fig 15. RAM addressing scheme

001aaj920

LSB

1 byte

X address

X max

Y max

Y address

MSB

PCF8579 Datasheet(PDF) 20 Page - NXP Semiconductors