SH7262 datasheet(15/45 Pages) RENESAS

15 / 45 page

SH7262/SH7264 Group

High-speed Read/Write Serial Flash Memory

Using the Renesas Serial Peripheral Interface

REJ06B0889-0100/Rev.1.00

June 2009

Page 15 of 45

Enable the transfer request to DMAC

• Set the CHCR register (H'0000 0000)

Function: Disable the DMA transfer

• Set the DMARS register (H'0052)

Function: Specify the RSPI channel 0 reception as the factor to

activate the DMAC

• Set the DMAOR register (H'0001)

Function: Enable the DMA transfer on all channels

• Set the SAR register (Set the SPDR register address)

Function: Specify the DMA transfer source address

• Set the DAR register

Function: Specify the DMA transfer destination address)

• Set the DMATCR register

Function: Specify the number of the DMA transfers

• Set the CHCR register (H'0000 4811)

Functions:

(1) Specify the DMA transfer to stop when the TE bit is set

(2) Increment the destination address

(3) Fix the source address

(4) Specify the DMA extension selector as the transfer request source

(5) Specify the transfer bus mode as the cycle steal mode

(6) Specify the transfer size in units of longword

(7) Disable the interrupt request

(8) Enable the DMA transfer

Set the DMA transfer

• Set the SPCR register (SPRIE bit = 1)

Function: Enable the RSPI receive interrupt

(As this is specified as a factor to activate the DMAC, the interrupt is not

requested to CPU.)

Figure 12 Flow Chart of the Read Command Transfer (2/3)

SH7262 Datasheet(PDF) 15 Page - Renesas Technology Corp