| Electronic Components Datasheet Search |
|
SH7262 Datasheet(PDF) 16 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
SH7262 Datasheet(HTML) 16 Page - Renesas Technology Corp |
|
16 / 45 page ![]() SH7262/SH7264 Group High-speed Read/Write Serial Flash Memory Using the Renesas Serial Peripheral Interface REJ06B0889-0100/Rev.1.00 June 2009 Page 16 of 45 C End DMA transfer is completed? Yes No Disable the SPI to transfer data • Set the SPCR register (SPE bit = 0) Function: Disable the RSPI SSL signal is negated by this setting. As the RSPI control bit is not initialized, reset the SPE bit to 1 to activate the RSPI in the same transfer mode. • Make sure the transfer is complete before clearing the SPE bit. Wait for the transfer end Start to transmit dummy data • Set the SPDCR register (TXDMY bit = 1) Function: Enable the SPI to transmit dummy data (The dummy data is automatically sent when not writing data in the Data register.) Stop transmitting the dummy data Reset the access width in bytes • Set the SPDCR register (SPLW bit = 1) Function: Specify the access width to the SPDR register as 8-bit • Set the SPCMD register (SPB bit = 7) Function: Specify the transfer data length as 8-bit Disable the DMA transfer Figure 13 Flow Chart of the Read Command Transfer (3/3) |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |