LMX2541 datasheet(36/40 Pages) NSC

36 / 40 page

3.8 LOOP FILTER

Loop filter design can be rather complicated, but there are

design tools and references available at www.national.com.

The loop bandwidth can impact the size of loop filter capaci-

tors and also how the phase noise is filtered. For optimal

integrated phase noise, choose the bandwidth to be about

20% wider than the frequency where the in-band PLL phase

noise (as described in 3.4 PLL PHASE NOISE) and open loop

VCO noise cross. This optimal loop bandwidth may need ad-

justment depending on the application requirements. Reduc-

tion of spurs can be achieved by reducing the loop bandwidth.

On the other hand, a wider loop bandwidth may be required

for faster lock time. Note that using the integrated loop filter

components can lead to a significant restriction on the loop

bandwidth and should be used with care. 2 k

Ω for R3_LF and

R4_LF is a good starting point. If the integrated loop filter re-

stricts the loop bandwidth, then first try to relieve this restric-

tion by reducing the integrated loop filter resistors and then

reduce the capacitors only if necessary.

3.9 CONFIGURING THE LMX2541 FOR OPTIMAL

PERFORMANCE

Determine the Channel Spacing (f

CH)

For a system that has a VCO that tunes over several

frequencies, the channel spacing is the tuning increment.

In the case that the VCO frequency is fixed, this channel

spacing is the greatest number that divides both the VCO

frequency and the OSCin frequency.

Determine OSCin Frequency (f

OSCin)

If the OSCin frequency is not already determined, then

there are several considerations. A higher frequency is

generally, but not always, preferable. One reason for this

is that it has a higher slew rate if it is a sine wave. Another

reason is that the clock for the VCO frequency calibration

is based on the OSCin frequency and in general will run

faster for higher OSCin frequencies.

Although a higher OSCin frequency is desirable, there

are also reasons to use a lower frequency. If the OSCin

frequency is strategically chosen, the worst case

fractional spur channels might fall out of band. Also, if the

OSCin frequency can be chosen such that the fractional

denominator can avoid factors of 2 and/or 3, the sub-

fractional spurs can be reduced.

Determine the Phase Detector Frequency (f

PD) ,

Charge Pump Gain (K

PD) and Fractional Denominator

(FDEN)

In general, choose the highest phase detector frequency

and charge pump gain, unless it leads to loop filter

capacitor values that are unrealistically large for a given

loop bandwidth. In this case, reducing either the phase

detector frequency or the charge pump gain can yield

more feasible capacitor values. Other reasons for not

using the highest charge pump gain is to allow some

adjustment margin to compensate for changes in the

VCO gain or allow the use of Fastlock.

For choosing the fractional denominator, start with FDEN

= f

PD/fCH. As discussed previously, there might be

reasons to choose larger equivalent fractions.

Design the Loop Filter

Determine the Modulator Order

Determine Dithering and Potential Larger Equivalent

Fractional Value

3.9 EXTERNAL VCO MODE

The LMX2541 also has provisions to be driven with an exter-

nal VCO as well. In this mode, the user has the option of using

the RFout pin output, although if this pin is used, the VCO

input frequency is restricted to 4 GHz. If not used, the RFout

pin should be left open. The VCO input is connected to the

ExtVCOin pin. Because the internal VCO is not being used,

the part option that is being used does not have a large impact

on phase noise or spur performance. It is also possible to

switch between both Full Chip mode and External VCO mode.

3.10 DIGITAL FSK MODE

The LMX2541 supports 2-level digital frequency shift keying

(FSK) modulation. The bit rate is limited by the loop bandwidth

of the PLL loop. As a general rule of thumb, it is desirable to

have the loop bandwidth at least twice the bit rate. This is

achieved by changing the N counter rapidly between two

states. The fractional numerator and denominator are restrict-

ed to a length of 12 bits. The 12 LSB’s of the numerator and

denominator set the center frequency, Fcenter, and the 10

MSB’s of the numerator set the frequency deviation, Fdev.

The LMX2541 has the ability to switch between two different

numerator values based on the voltage at the DATA pin.

When DATA is low, the output frequency will be Fcenter –

Fdev and when the DATA pin is high the output frequency will

be Fcenter + Fdev.A limitation of the FSK mode is that it does

not function on integer channels and the frequency deviation

can not cause the N counter to cross integer boundaries.

When using FSK mode, the FDM bit needs to be set to zero.

LMX2541 Datasheet(PDF) 36 Page - National Semiconductor (TI)

LMX2541 Datasheet(HTML) 36 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

Datasheet Download

Link URL