DS3104 datasheet(19/136 Pages) MAXIM

19 / 136 page

________________________________________________________________________________________ DS3104-SE

19-4627; Rev 6; 5/09

19 of 136

7.4

Input Clock Configuration

The DS3104-SE has eight input clocks: IC1 to IC6, IC8, and IC9. Table 7-1 provides summary information about

each clock, including signal format and available frequencies. The device tolerates a wide range of duty cycles on

input clocks, out to a minimum high time or minimum low time of 3ns or 30% of the clock period, whichever is

smaller.

7.4.1 Signal Format Configuration

Inputs with CMOS/TTL signal format accept both TTL and 3.3V CMOS levels. One key configuration bit that affects

the available frequencies is the SONSDH bit in MCR3. When SONSDH = 1 (SONET mode), the 1.544MHz

frequency is available. When SONSDH = 0 (SDH mode), the 2.048MHz frequency is available. During reset the

default value of this bit is latched from the SONSDH pin.

Input clocks IC1, IC2, IC5, and IC6 can be configured to accept LVDS, LVPECL, or CMOS/TTL signals by using

the proper set of external components. The recommended LVDS termination is shown in Figure 10-1 while the

recommended LVPECL termination is shown in Figure 10-2. The electrical specifications for these inputs are listed

in Table 10-4. To configure these differential inputs to accept single-ended CMOS/TTL signals, use a voltage-

divider to bias the ICxNEG pin to approximately 1.4V and connect the single-ended signal to the ICxPOS pin. If a

differential input is not used it should be configured left floating (one input is internally pulled high and the other

internally pulled low). (See also MCR5:IC5SF and IC6SF.)

Table 7-1. Input Clock Capabilities

INPUT CLOCK

SIGNAL FORMATS

FREQUENCIES (MHz)

DEFAULT FREQUENCY

IC1

LVDS/LVPECL or CMOS/TTL

Up to 156.25 (2)

8kHz

IC2

LVDS/LVPECL or CMOS/TTL

Up to 156.25 (2)

8kHz

IC3

CMOS/TTL

Up to 125 (1)

8kHz

IC4

CMOS/TTL

Up to 125 (1)

8kHz

IC5

LVDS/LVPECL or CMOS/TTL

Up to 156.25 (2)

19.44MHz

IC6

LVDS/LVPECL or CMOS/TTL

Up to 156.25 (2)

19.44MHz

IC8

CMOS/TTL

Up to 125 (1)

19.44MHz

IC9

CMOS/TTL

Up to 125 (1)

19.44MHz

Note 1: Available frequencies for CMOS/TTL input clocks are: 2kHz, 4kHz, 8kHz, 1.544MHz (SONET mode), 2.048MHz (SDH mode),

6.312MHz, 6.48MHz, 19.44MHz, 25.0MHz, 25.92MHz, 38.88MHz, 51.84MHz, 62.5MHz, 77.76MHz, and any multiple of 2kHz up to 125MHz.

Note 2: Available frequencies for LVDS/LVPECL input clocks include all CMOS/TTL frequencies in Note 1 plus any multiple of 8kHz up to

155.52MHz and 156.25MHz.

DS3104 Datasheet(PDF) 19 Page - Maxim Integrated Products

DS3104 Datasheet(HTML) 19 Page - Maxim Integrated Products

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL