| Electronic Components Datasheet Search |
|
DS3104 Datasheet(PDF) 39 Page - Maxim Integrated Products |
|
|
|||||||||||||||||||||||||||||
DS3104 Datasheet(HTML) 39 Page - Maxim Integrated Products |
|
39 / 136 page ![]() ________________________________________________________________________________________ DS3104-SE 19-4627; Rev 6; 5/09 39 of 136 7.8.2.3 OC1 to OC7 Configuration The following is a step-by-step procedure for configuring the frequencies of output clocks OC1 to OC7: 1) Determine whether the T4 APLL must be independent of the T0 DPLL. If the T4 APLL must be independent, set T4APT0 = 0 in register T0CR1. If the T4 APLL must be locked to the T0 DPLL, set T4APT0 = 1. 2) Use Table 7-9 to select a set of output frequencies for each APLL, T0 and T4. Each APLL can only generate one set of output frequencies. (In SONET/SDH equipment, the T0 APLL is typically configured for a frequency of 311.04MHz to get 19.44MHz and/or 38.88MHz output clocks to distribute to system line cards.) 3) Determine from Table 7-9 the T0 and T4 APLL frequencies required for the frequency sets chosen in step 2. 4) Configure the T0FREQ field in register T0CR1 as shown in Table 7-10 for the T0 APLL frequency determined in step 3. Configure the T4FREQ field in register T4CR1 as shown in Table 7-12 for the T4 APLL frequency determined in step 3. If the T4 APLL is locked to the T0 DPLL, the T4APT0 and T0FT4 fields in T0CR1 must also be configured as shown in Table 7-12. 5) Using Table 7-9 and Table 7-13, configure the frequencies of output clocks OC1 to OC7 in the OFREQn fields of registers OCR1 to OCR4 and the AOFn bit in the OCR5 register. Table 7-14 lists all standard frequencies for the output clocks and specifies how to configure the T0 APLL and/or the T4 APLL to obtain each frequency. Table 7-14 also indicates the expected jitter amplitude for each frequency. Table 7-7. Digital1 Frequencies DIG1F[1:0] SETTING IN MCR7 DIG1SS SETTING IN MCR6 FREQUENCY (MHz) JITTER (pk-pk ns, typ) 00 0 2.048 < 1 01 0 4.096 < 1 10 0 8.192 < 1 11 0 16.384 < 1 00 1 1.544 < 1 01 1 3.088 < 1 10 1 6.176 < 1 11 1 12.352 < 1 Table 7-8. Digital2 Frequencies DIG2AF SETTING IN MCR6 DIG2F[1:0] SETTING IN MCR7 DIG2SS SETTING IN MCR6 FREQUENCY (MHz) JITTER (pk-pk ns, typ) 1 00 0 6.312 < 1 1 10 0 10.000 <1 1 00 1 19.440 < 1 1 01 1 38.880 < 1 0 00 0 2.048 < 1 0 01 0 4.096 < 1 0 10 0 8.192 < 1 0 11 0 16.384 < 1 0 00 1 1.544 < 1 0 01 1 3.088 < 1 0 10 1 6.176 < 1 0 11 1 12.352 < 1 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |