MAX11080 datasheet(13/27 Pages) MAXIM

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referenced voltage is then connected to a set of over-

voltage and undervoltage comparators. The threshold

references for the comparators are set by the UVSEL_

and OVSEL_ input pins. When one of the cell voltages

exceeds VOV or is below VUV when VUV is enabled, the

internal cell out-of-range signal for the given cell is set

and logically ORed with the same signal for the other

cell positions to create an overall out-of-range signal.

When any cells are out-of-range as indicated by the

internal out-of-range signal, an internal current source

begins to charge the capacitor CDLY connected to the

CD pin. If the voltage at the CD pin reaches VCD, the

ALRML line is set to VAA (+2.4V minimum as referred to

AGND). Normally, the ALRML line is a heartbeat signal

with pulses occurring every 250µs. If all cell voltages

transition from out-of-range to in-range before the volt-

age at pin CD reaches VCD, an internal switch clamps

the CD pin to GND. This action discharges CDLY and,

because the delay had not yet expired, no alarm

occurs. Discharging CDLY ensures that the full delay

time occurs for the next overvoltage or undervoltage

event. Figure 8 summarizes the CDLY circuit.

12-Channel, High-Voltage Battery-Pack

Fault Monitor

______________________________________________________________________________________

75mV

HYSTERESIS

75mV

HYSTERESIS

SHORT-CIRCUIT

DETECTOR

UNDERVOLTAGE

COMPARATOR

ENABLE

CELL

OUT-OF-RANGE

VUV/4

VSC/4

VOV/4

VCELL/4

VCELL

RSHIFT

RIN*

40M

Ω

TYP

Ω

TYP

AGND

VCELL

Ω

TYP

VCELL/(4 x RSHIFT)

CELLS 2-12

CELL 1

CN+1

Figure 7. Cell Differential Input and Comparator Block Diagram

CELL OUT-OF-RANGE

1 TO 12

OUT-OF-RANGE

VAA

ICD

6.1

µA

VCD

THRESHOLD

ALARM

CDLY

Ω

Figure 8. CDLY Circuit Block Diagram

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