Electronic Components Datasheet Search
  English  ▼

X  

AD7193 Datasheet(PDF) 4 Page - Analog Devices

Part # AD7193
Description  4-Channel, 4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA
PDF  56 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD7193 Datasheet(HTML) 4 Page - Analog Devices

  AD7193 Datasheet HTML 1Page - Analog Devices AD7193 Datasheet HTML 2Page - Analog Devices AD7193 Datasheet HTML 3Page - Analog Devices AD7193 Datasheet HTML 4Page - Analog Devices AD7193 Datasheet HTML 5Page - Analog Devices AD7193 Datasheet HTML 6Page - Analog Devices AD7193 Datasheet HTML 7Page - Analog Devices AD7193 Datasheet HTML 8Page - Analog Devices AD7193 Datasheet HTML 9Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 4 / 56 page
background image
AD7193
Rev. A | Page 4 of 56
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments1
Normal-Mode Rejection2
Sinc4 Filter
Internal Clock
@ 50 Hz, 60 Hz
100
dB
10 Hz output data rate, 50 Hz ± 1 Hz,
60 Hz ± 1 Hz
74
dB
50 Hz output data rate, REJ606 = 1,
50 Hz ± 1 Hz, 60 Hz ± 1 Hz
@ 50 Hz
96
dB
50 Hz output data rate, 50 Hz ± 1 Hz
@ 60 Hz
97
dB
60 Hz output data rate, 60 Hz ± 1 Hz
External Clock
@ 50 Hz, 60 Hz
120
dB
10 Hz output data rate, 50 Hz ± 1 Hz,
60 Hz ± 1 Hz
82
dB
50 Hz output data rate, REJ606 = 1,
50 Hz ± 1 Hz, 60 Hz ± 1 Hz
@ 50 Hz
120
dB
50 Hz output data rate, 50 Hz ± 1 Hz
@ 60 Hz
120
dB
60 Hz output data rate, 60 Hz ± 1 Hz
Sinc3 Filter
Internal Clock
@ 50 Hz, 60 Hz
75
dB
10 Hz output data rate, 50 Hz ± 1 Hz,
60 Hz ± 1 Hz
60
dB
50 Hz output data rate, REJ606 = 1,
50 Hz ± 1 Hz, 60 Hz ± 1 Hz
@ 50 Hz
70
dB
50 Hz output data rate, 50 Hz ± 1 Hz
@ 60 Hz
70
dB
60 Hz output data rate, 60 Hz ± 1 Hz
External Clock
@ 50 Hz, 60 Hz
100
dB
10 Hz output data rate, 50 Hz ± 1 Hz,
60 Hz ± 1 Hz
@ 50 Hz
67
dB
50 Hz output data rate, REJ606 = 1,
50 Hz ± 1 Hz, 60 Hz ± 1 Hz
@ 50 Hz
95
dB
50 Hz output data rate, 50 Hz ± 1 Hz
@ 60 Hz
95
dB
60 Hz output data rate, 60 Hz ± 1 Hz
Fast Settling
Internal Clock
@ 50 Hz
26
dB
FS[9:0]3 = 6, average by 16, 50 Hz ± 0.5 Hz
@ 60 Hz
26
dB
FS[9:0]3 = 5, average by 16, 60 Hz ± 0.5 Hz
External Clock
@ 50 Hz
40
dB
FS[9:0]3 = 6, average by 16, 50 Hz ± 0.5 Hz
@ 60 Hz
40
dB
FS[9:0]3 = 5, average by 16, 60 Hz ± 0.5 Hz
ANALOG INPUTS
Differential Input
Voltage Ranges
±VREF/gain
V
VREF = REFINx(+) − REFINx(−),
gain = 1 to 128
−(AVDD − 1.25 V)/gain
+(AVDD − 1.25 V)/gain
V
Gain > 1
Absolute AIN Voltage
Limits2
Unbuffered Mode
AGND − 0.05
AVDD + 0.05
V
Buffered Mode
AGND + 0.25
AVDD − 0.25
V
Analog Input Current
Buffered Mode
Input Current2
−2
+2
nA
Gain = 1
−3
+3
nA
Gain > 1
Input Current Drift
±5
pA/°C
Unbuffered Mode
Input Current
±3.5
μA/V
Gain = 1, input current varies with input
voltage
±1
μA/V
Gain > 1
Input Current Drift
±0.05
nA/V/°C
External clock
±1.6
nA/V/°C
Internal clock



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com