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SMM665C Datasheet(PDF) 15 Page - Summit Microelectronics, Inc.

Part # SMM665C
Description  Six-Channel Active DC Output Controller, Monitor, Marginer and Sequencer
PDF  36 Pages
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Manufacturer  SUMMIT [Summit Microelectronics, Inc.]
Direct Link  http://www.summitmicro.com
Logo SUMMIT - Summit Microelectronics, Inc.

SMM665C Datasheet(HTML) 15 Page - Summit Microelectronics, Inc.

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SMM665C
Summit Microelectronics, Inc
2125 3.1 7/22/2008
15
APPLICATIONS INFORMATION (CONTINUED)
While the SMM665C is in the Power-on sequencing
mode the RST output is held active and the HEALTHY
output is held inactive regardless of trigger sources
(Figure 8). The Power-off and Force Shutdown trigger
options are also disabled while in this mode.
Furthermore, the SMM665C will not respond to activity
on the PWR_ON/OFF pin or to a Power-off I
2C
command during Power-on sequencing mode.
ONGOING OPERATIONS-MONITORING MODE
During ongoing operations mode, the part can (1)
monitor (2) actively control via ADOC, and (3) use
force shutdown if necessary.
Once the Power-on sequence is complete and before
a Power-off sequence has been initiated, the
SMM665C continues to monitor all VMX inputs, the
VDD and 12VIN inputs, and two temperature sensor
inputs with a 10-bit ADC. Each of these inputs is
sampled and converted by the ADC every 2ms. The
ADC input has a range of 0V to four times the voltage
on VREF_ADC for inputs VMA-F and the VDD input.
The range is extended to 12 times VREF_ADC for the
12VIN input and is reduced to two times VREF_ADC
for the AIN1 and AIN2 inputs.
The SMM665C monitors internal temperature using
the 10-bit ADC and the auto-monitor function. Two
under
temperature
and
two
over
temperature
thresholds
can
be
set,
each
with
its
own
programmable
trigger
options
and
consecutive
conversion before trigger counter. Resolution is 0.25 C
per bit scaled over the range of
-128 C to 127.75 C.
The temperature value can be acquired over the I
2C
bus as a 10-bit signed two's complement value.
The SMM665C compares each resulting ADC
conversion with two programmable 10-bit under-
voltage limits (UV1, UV2) and two programmable 10-
bit
over-voltage
limits
(OV1,
OV2)
for
the
corresponding input.
A consecutive conversion
counter is used to provide filtering of the ADC inputs.
Each limit can be programmed to require 1, 2, 4 or 6
consecutive out-of-limit conversions before it is said to
be in fault. One in-limit conversion will remove the
fault from the threshold limit.
This provides digital
filtering of the monitored inputs. The ADC inputs VMA-
F can use additional filtering by connecting a capacitor
from the corresponding CAPX pins to ground to form
an analog RC filter (R=25k
Ω). The input is considered
to be in a fault condition if any of its limit thresholds
are in fault. Setting an OV threshold limit to full-scale
(3FFHEX), or setting an UV threshold limit to 000HEX
ensures that the limit can never be in fault.
The status registers provide the real-time status of all
monitored inputs.
The voltage threshold limits for inputs VMA-F, VDD and
12VIN can be programmed to trigger the RST and
HEALTHY outputs as well as a Force Shutdown and
Power-off operation when exceeded. The threshold
limits for the internal temperature sensor and the AIN1
and AIN2 inputs can be programmed to trigger the
RST, HEALTHY, and FAULT outputs.
The HEALTHY and FAULT outputs of the SMM665C
are active as long as the triggering limit remains in a
fault condition. The RST output also remains active as
long as the triggering limit remains in a fault condition;
however, once the trigger source goes away the RST
will remain active for a reset timeout period (tPRTO).
AUTO-MONITOR MODE
The auto-monitor mode, responsible for monitoring all
voltage thresholds and triggering the programmable
options, is paused during an I
2C transaction. This is
done to allow the I
2C interface to access the internal
data bus that is used in the auto-monitor function
Specifically, the auto-monitor is paused approximately
100ns after the falling edge of SCL during
transmission of the R/W bit of a valid slave address.
For normal I
2C transactions, the auto-monitor function
is resumed following an I
2C STOP issued at the end of
the transaction or upon the NACK of an invalid slave
address. For I2C ADC conversion transactions, which
employ acknowledge polling, the auto-monitor function
is resumed after the conversion has completed
(approximately 300us after the second ACK of the
transaction) and following a I
2C STOP issued at the
end of the transaction or upon the NACK of an invalid
slave address.
During every suspension of the auto-monitor, a 25ms
timer is activated. The clock stage will determine the
exact timeout period, typically between 25msec and
50msec. Should the I
2C transaction fail, this timer will
expire and restart the auto-monitor.
See “Auto-Monitor Function” section for timing details
and conditions under which the auto-monitor timer will
be asserted.



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