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LTC3546

3546fb

APPLICATIONS INFORMATION

Keeping the current small (<20μA) in these resistors

maximizes efﬁciency, but making the current too small

may allow stray capacitance to cause noise problems and

reduce the phase margin of the error amp loop.

Toimprovethefrequencyresponse,afeedforwardcapacitor

CFF may also be used. Typical values used here are 10pf to

100pf. Great care should be taken to route the VFBnodeaway

from noise sources, such as the inductor or an SW line.

Shutdown, Soft-Start and Tracking Start-Up

The LTC3546 start-up works by comparing two inputs, an

internal 1.2ms linear soft-start ramp and the TRACK/SS

pin. Whichever input is lower in voltage is the controlling

voltage used for start-up. The internal start-up ramps

to 0.6V in 1.2ms. If a slower start-up is desired, the

TRACK/SS pin has a 1.15μA pull up current so a start-up

ramp rate can be programmed with an external capacitor,

or a voltage divider from another signal can be applied

to the TRACK/SS pin.

During start-up the controlling voltage must rise above

120mV before the output will start switching.

When the RUN pin is low, both the internal 1.2ms soft-start

ramp and the TRACK/SS pin are pulled to ground. When

the RUN pin is pulled high, both the internal soft-start ramp

and the TRACK/SS pin are released. From the time when

the RUN pin is asserted until the controlling voltage reaches

0.6V, the regulator is in the start-up state. In this state, the

error ampliﬁer will compare the feedback signal at VFB to

the controlling voltage (the lower of either the TRACK/SS

voltage or the internal ramp voltage) and the regulator

will force them to be equal. In this state, the mode of the

regulator is forced to pulse skipping. The regulator will

continue in this manner until the voltage on the control-

ling voltage rises above 0.6V. Once the controlling ramp

signal is above 0.6V the error ampliﬁer uses the internal

0.6V reference and the operational mode will switch to

the mode set by the SYNC/MODE pin.

If the TRACK/SS pin is ramped down after start-up, the

error ampliﬁer will compare the feedback signal at VFB

to the voltage on the TRACK/SS pin once the TRACK/SS

voltage drops 6% below the internal reference voltage of

0.6V (0.564V). The regulator will try to force the VFB voltage

to equal the TRACK/SS voltage if there is sufﬁcient load

current to pull the output low at this rate, otherwise the

output will ramp down at the discharge rate of the output

capacitor. Once the TRACK/SS voltage drops below about

100mV all switching functions cease and the regulator is

forced back into pulse-skipping mode. The operational

mode while TRACK/SS is ramping down is set by the

MODE/SYNC pin.

To use the internal 1.2ms linear soft-start controlling

voltage leave the TRACK/SS pin ﬂoating. By ﬂoating the

TRACK/SS pin the internal 1.15μA pull up current will pull

the TRACK/SS pin up faster than the internal 1.2ms ramp.

Care must be taken to insure the TRACK/SS ramp up time

(from 0V to 0.6V) is much shorter than the internal 1.2ms

ramp time. Parasitic capacitance on this pin should be

much smaller than:

µA

PARASITICTRACK SS

•

115

1 2

CPARASITICTRACK/SS << 2.3nF

An externally controlled soft-start ramp is obtained when

an external capacitor is connected from the TRACK/SS

pin to ground and its ramp rate is slower than the internal

soft-start ramp. In this conﬁguration, soft-start times longer

than 1.2ms can be achieved. When RUN is pulled high, the

internal 1.15μA current source charges the external capaci-

tor linearly from 0V. While the TRACK/SS pin is below 0.6V

the error ampliﬁer forces the regulator to drive the VFBpinto

the voltage on the TRACK/SS pin. Once the VFB pin reaches

0.6V the regulator switches to the internal 0.6V reference.

The ramp-up time for the output is calculated as:

µA

RAMP

TRACK SS

•

115

For this equation to be valid, the ramp time must be greater

than 1.2ms thus:

µA

TRACK SS

≥

•

115

1 2

CTRACK/SS ≥ 2.3nF

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