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56F8366 Datasheet(PDF) 116 Page - Freescale Semiconductor, Inc

Part # 56F8366
Description  16-bit Digital Signal Controllers
PDF  182 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

56F8366 Datasheet(HTML) 116 Page - Freescale Semiconductor, Inc

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56F8366 Technical Data, Rev. 7
116
Freescale Semiconductor
Preliminary
•
Stop Mode
When in Stop mode, the 56800E core, memory, and most peripheral clocks are shut down. Optionally, the
COP and CAN can be stopped. For lowest power consumption in Stop mode, the PLL can be shut down.
This must be done explicitly before entering Stop mode, since there is no automatic mechanism for this. The
CAN (along with any non-gated interrupt) is capable of waking the chip up from Stop mode, but is not fully
functional in Stop mode.
6.4 Operating Mode Register
Figure 6-1 OMR
The reset state for MB and MA will depend on the Flash secured state. See Part 4.2 and Part 7 for detailed
information on how the Operating Mode Register (OMR) MA and MB bits operate in this device. For
additional information, see the DSP56800E Reference Manual.
Note:
The OMR is not a Memory Map register; it is directly accessible in code through the acronym OMR.
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
NL
CM
XP
SD
R
SA
EX
0
MB
MA
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RESET
0
0
0000
0
0
0
0
0
0
0
0
X
X



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