1

2

3

6

5

4

V+

Enable

Out

+In

GND

R

SET

OPA362

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

ABSOLUTE MAXIMUM RATINGS

(1)

Over operating free-air temperature range, unless otherwise noted.

VALUE

UNIT

Supply Voltage, V+ to V–

+3.6

V

– 0.5 to (V+) + 0.5

V

Signal Input

Terminals

±10

mA

Output Short-Circuit through 75

Continuous

Operating Temperature

–40 to +125

°C

Storage Temperature

–65 to +150

°C

Junction Temperature

+160

°C

Human Body Model (HBM)

5000

V

ESD Ratings

Charged Device Model (CDM)

2000

V

Machine Model (MM)

400

V

(1)

Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may

degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond

those specified is not supported.

(2)

Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5V beyond the supply rails should

be current-limited to 10mA or less.

(3)

Short-circuit to ground.

PRODUCT

PACKAGE-LEAD

PACKAGE DESIGNATOR

PACKAGE MARKING

OPA362

SC70-6

DCK

OEA

(1)

For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI

web site at www.ti.com.

DCK PACKAGE

SC70-6

(TOP VIEW)

Note:

The location of pin 1 on the OPA362 is determined by orienting the package marking as shown in the illustration.

2

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