XCM520 datasheet(19/43 Pages) TOREX

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XCM520

Series

●Note on use of pattern layouts

1. Please use this IC within the stated absolute maximum ratings. The IC is liable to malfunction should the ratings be

exceeded.

2. The capacitor (CIN) should be connected as close as possible to the VIN and VSS pins.

When wiring impedance is high, noise propagation by output current or phase discrepancy occur which results in

unstable operating. In this case, please reinforce VIN and VSS rails. If the operation is still unstable, please increase

input capacitance CIN.

3. With comparison to the separate product usage, the two chips are placed in adjacent in the package so heat generation

Is influenced each other. Please evaluate and verify in the actual design.

●Instructions of pattern layouts

1. In order to stabilize VIN1・VIN2・VOUT1・VOUT2・VOUT3, we recommend that a by-pass capacitor (CIN1・CIN2・CL1・CL2・

CL3) be connected as close as possible to the VIN1・VIN2・VOUT1・VOUT2・VOUT3 and VSS pin.

2. Please mount each external component as close to the IC as possible.

Wire external components as close to the IC as possible and use thick, short connecting traces to reduce the circuit

impedance.

4. VSS（AGND・PGND・VSS）ground wiring is recommended to get large area. The IC may goes into unstable operation

as a result of VSS voltage level fluctuation during the switching.

5. Heat is generated because of the output current (IOUT) and ON resistance of driver transistors.

●Reference Pattern Layout

■NOTE ON USE (Continued)

Front

Back

セラミックコンデンサ

インダクタ

Ceramic Capacitor

Inductor

TO EX

AGND

VOUT

XCM520

er . .

1 O

USP 12B

CL 3

EN3 MODE

EN1

GND

VOUT 1

VOUT 2

EN2

CL2

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