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ICS830584I Datasheet(PDF) 5 Page - Integrated Device Technology

Part # ICS830584I
Description  LOW SKEW, PCI-X 1-TO-4 FANOUT BUFFER
PDF  12 Pages
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

ICS830584I Datasheet(HTML) 5 Page - Integrated Device Technology

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IDT™ / ICS™ PCI-X 1-TO-4 FANOUT BUFFER
5
ICS830584AGI REV. B MARCH
31, 2009
ICS830584I
LOW SKEW, PCI-X 1-TO-4 FANOUT BUFFER
ADDITIVE PHASE JITTER
The spectral purity in a band at a specific offset from the
fundamental compared to the power of the fundamental is called
the
dBc Phase Noise. This value is normally expressed using a
Phase noise plot and is most often the specified plot in many
applications. Phase noise is defined as the ratio of the noise power
present in a 1Hz band at a specified offset from the fundamental
frequency to the power value of the fundamental. This ratio is
expressed in decibels (dBm) or a ratio of the power in the 1Hz
As with most timing specifications, phase noise measurements
has issues relating to the limitations of the equipment. Often the
noise floor of the equipment is higher than the noise floor of the
band to the power in the fundamental. When the required offset
is specified, the phase noise is called a
dBc value, which simply
means dBm at a specified offset from the fundamental. By
investigating jitter in the frequency domain, we get a better
understanding of its effects on the desired application over the
entire time record of the signal. It is mathematically possible to
calculate an expected bit error rate given a phase noise plot.
device. This is illustrated above. The device meets the noise floor
of what is shown, but can actually be lower. The phase noise is
dependent on the input source and measurement equipment.
OFFSET FROM CARRIER FREQUENCY (HZ)
Input/Output Additive Phase Jitter at
140MHz (12kHz – 20MHz) = 0.15ps typical



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