AT89LP6440 datasheet(138/194 Pages) ATMEL

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3706A–MICRO–9/09

AT89LP6440 - Preliminary

be set by hardware while the conversion is in progress. Note that the timer overflow rate must be

slower than the conversion time.

20.5

Noise Considerations

Digital circuitry inside and outside the device generates EMI which might affect the accuracy of

analog measurements. If conversion accuracy is critical, the noise level can be reduced by

applying the following techniques:

• Connect the AVDD pin to the digital VDD supply voltage via an LC network as shown in Figure

20-7. Values should be chosen to fit the system. Note this example has a cutoff frequency of

~160kHz and works best for devices operate at 1 MHz or above.

• Keep analog signal paths as short as possible. Make sure to run analog signals tracks over

an analog ground plane, and keep them well away from high-speed digital tracks.

•Place the CPU in Idle during a conversion.

•If any Port 0 pins are used as digital outputs, it is essential that these do not switch while a

conversion is in progress.

Figure 20-7. Example ADC Power Connections (TQFP Package)

Analog Ground

Plane

P0.7 (ADC7)

μH

P0.6 (ADC6)

P0.5 (ADC5)

P0.4 (ADC4)

GND

100

AT89LP6440 Datasheet(PDF) 138 Page - ATMEL Corporation