AT32AP7002 datasheet(49/896 Pages) ATMEL

49 / 896 page

32054F–AVR32–09/09

AT32AP7002

different Input Selection Modes. See Section 7.5 ”Input Pixel Selector” on page 28 for a description of the Input Pixel

Selector.

• OFFSET_FRAC_BITS: Offset Fractional Bits

Specifies the number of fractional bits in the fixed-point offsets input to each VMU. Must be in the range from 0 to

COEFF_FRAC_BITS. Other values gives undefined results.This value is used for scaling the OFFSETn values before

being input to VMUn so that the offset will have the same fixed-point format as the outputs from the multiplication stages

before performing the vector addition in the VMU.

• COEFF_FRAC_BITS: Coefficient Fractional Bits

Specifies the number of fractional bits in the fixed-point coefficients input to each VMU. Must be in the range from 0 to 11,

since at least one bit of the coefficient must be used for the sign. Other values gives undefined results.

COEFF_FRAC_BITS is used in the Output Pixel Inserter to scale the fixed-point results from the VMUs back to unsigned 8-

bit integers.

Table 7-3.

Input Selection Modes

ISM

Mode

Transformation Mode

VMU0, VMU1 and VMU2 get the same pixel inputs. These three pixels can be

freely selected from the INPIXn registers.

Horizontal Filter Mode

Pixel triplets are selected for input to each of the VMUs by addressing

horizontal pixel triplets from the INPIXn registers.

Vertical Filter Mode

Pixel triplets are selected for input to each of the VMUs by addressing vertical

pixel triplets from the INPIXn registers.

Reserved

N.A

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