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ATmega324P Datasheet(PDF) 261 Page - ATMEL Corporation

Part # ATmega324P
Description  8-bit Microcontroller with 16/32/64K Bytes In-System Programmable Flash
PDF  377 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

ATmega324P Datasheet(HTML) 261 Page - ATMEL Corporation

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7674F–AVR–09/09
ATmega164P/324P/644P
21.9.3
ADCL and ADCH – The ADC Data Register
ADLAR = 0
ADLAR = 1
When an ADC conversion is complete, the result is found in these two registers. If differential
channels are used, the result is presented in two’s complement form.
When ADCL is read, the ADC Data Register is not updated until ADCH is read. Consequently, if
the result is left adjusted and no more than 8-bit precision is required, it is sufficient to read
ADCH. Otherwise, ADCL must be read first, then ADCH.
The ADLAR bit in ADMUX, and the MUXn bits in ADMUX affect the way the result is read from
the registers. If ADLAR is set, the result is left adjusted. If ADLAR is cleared (default), the result
is right adjusted.
• ADC9:0: ADC Conversion Result
These bits represent the result from the conversion, as detailed in “ADC Conversion Result” on
page 256.
21.9.4
ADCSRB – ADC Control and Status Register B
10
0
16
10
1
32
11
0
64
11
1
128
Table 21-5.
ADC Prescaler Selections (Continued)
ADPS2
ADPS1
ADPS0
Division Factor
Bit
15
14131211
10
9
8
(0x79)
––––––
ADC9
ADC8
ADCH
(0x78)
ADC7
ADC6
ADC5
ADC4
ADC3
ADC2
ADC1
ADC0
ADCL
765432
10
Read/Write
RRRR
RRRR
RRRR
RRRR
Initial Value
000000
00
000000
00
Bit
15
14131211
10
9
8
(0x79)
ADC9
ADC8
ADC7
ADC6
ADC5
ADC4
ADC3
ADC2
ADCH
(0x78)
ADC1
ADC0
–––––
–
ADCL
7654321
0
Read/Write
RRRR
RRRR
RRRR
RRRR
Initial Value
0000000
0
0000000
0
Bit
7
65
4
3
21
0
(0x7B)
–
ACME
–
–
–
ADTS2
ADTS1
ADTS0
ADCSRB
Read/Write
R
R/W
R
R
R
R/W
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0



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