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ATmega324P Datasheet(PDF) 334 Page - ATMEL Corporation

Part # ATmega324P
Description  8-bit Microcontroller with 16/32/64K Bytes In-System Programmable Flash
PDF  377 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

ATmega324P Datasheet(HTML) 334 Page - ATMEL Corporation

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334
7674F–AVR–09/09
ATmega164P/324P/644P
Figure 26-4. SPI Interface Timing Requirements (Slave Mode)
26.6
2-wire Serial Interface Characteristics
Table 26-7 describes the requirements for devices connected to the 2-wire Serial Bus. The ATmega164P/324P/644P
2-wire Serial Interface meets or exceeds these requirements under the noted conditions.
Timing symbols refer to Figure 26-5.
MISO
(Data Output)
SCK
(CPOL = 1)
MOSI
(Data Input)
SCK
(CPOL = 0)
SS
MSB
LSB
LSB
MSB
...
...
10
11
11
12
13
14
17
15
9
X
16
Table 26-7.
2-wire Serial Bus Requirements(1)
Symbol
Parameter
Condition
Min
Max
Units
VIL
Input Low-voltage
-0.5
0.3 VCC
V
VIH
Input High-voltage
0.7 VCC
VCC + 0.5
V
V
hys
Hysteresis of Schmitt Trigger Inputs
0.05 V
CC
(2)
–V
VOL
Output Low-voltage
3 mA sink current
0
0.4
V
tr
Rise Time for both SDA and SCL
20 + 0.1Cb
(2)(3)
300
ns
t
of
Output Fall Time from V
IHmin to VILmax
10 pF < C
b < 400 pF
(3)
20 + 0.1C
b
(2)(3)
250
ns
tSP
Spikes Suppressed by Input Filter
0
50(2)
ns
Ii
Input Current each I/O Pin
0.1VCC < Vi < 0.9VCC
-10
10
µA
C
i
Capacitance for each I/O Pin
–
10
pF
fSCL
SCL Clock Frequency
fCK
(4) > max(16f
SCL, 250kHz)
(5)
0
400
kHz
Rp
Value of Pull-up resistor
fSCL ≤100 kHz
fSCL > 100 kHz
tHD;STA
Hold Time (repeated) START Condition
f
SCL ≤100 kHz
4.0
–
µs
f
SCL > 100 kHz
0.6
–
µs
t
LOW
Low Period of the SCL Clock
fSCL ≤100 kHz
(6)
4.7
–
µs
f
SCL > 100 kHz
(7)
1.3
–
µs
VCC 0,4V
–
3mA
----------------------------
1000ns
Cb
-------------------
Ω
VCC 0,4V
–
3mA
----------------------------
300ns
Cb
----------------
Ω



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