ATmega88 datasheet(269/340 Pages) ATMEL

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7530H–AVR–02/09

ATmega48/88/168 Automotive

• Bit 2 – PGWRT: Page Write

If this bit is written to one at the same time as SELFPRGEN, the next SPM instruction within four

clock cycles executes Page Write, with the data stored in the temporary buffer. The page

address is taken from the high part of the Z-pointer. The data in R1 and R0 are ignored. The

PGWRT bit will auto-clear upon completion of a Page Write, or if no SPM instruction is executed

within four clock cycles. The CPU is halted during the entire Page Write operation if the NRWW

section is addressed.

• Bit 1 – PGERS: Page Erase

If this bit is written to one at the same time as SELFPRGEN, the next SPM instruction within four

clock cycles executes Page Erase. The page address is taken from the high part of the

Z-pointer. The data in R1 and R0 are ignored. The PGERS bit will auto-clear upon completion of

a Page Erase, or if no SPM instruction is executed within four clock cycles. The CPU is halted

during the entire Page Write operation if the NRWW section is addressed.

• Bit 0 – SELFPRGEN: Self Programming Enable

This bit enables the SPM instruction for the next four clock cycles. If written to one together with

either RWWSRE, BLBSET, PGWRT or PGERS, the following SPM instruction will have a spe-

cial meaning, see description above. If only SELFPRGEN is written, the following SPM

instruction will store the value in R1:R0 in the temporary page buffer addressed by the Z-pointer.

The LSB of the Z-pointer is ignored. The SELFPRGEN bit will auto-clear upon completion of an

SPM instruction, or if no SPM instruction is executed within four clock cycles. During Page Erase

and Page Write, the SELFPRGEN bit remains high until the operation is completed.

Writing any other combination than “10001”, “01001”, “00101”, “00011” or “00001” in the lower

five bits will have no effect.

24.6

Addressing the Flash During Self-Programming

The Z-pointer is used to address the SPM commands.

Since the Flash is organized in pages (see Table 25-12 on page 284), the Program Counter can

be treated as having two different sections. One section, consisting of the least significant bits, is

addressing the words within a page, while the most significant bits are addressing the pages.

This is1 shown in Figure 24-3. Note that the Page Erase and Page Write operations are

addressed independently. Therefore it is of major importance that the Boot Loader software

addresses the same page in both the Page Erase and Page Write operation. Once a program-

ming operation is initiated, the address is latched and the Z-pointer can be used for other

operations.

The only SPM operation that does not use the Z-pointer is Setting the Boot Loader Lock bits.

The content of the Z-pointer is ignored and will have no effect on the operation. The LPM

instruction does also use the Z-pointer to store the address. Since this instruction addresses the

Flash byte-by-byte, also the LSB (bit Z0) of the Z-pointer is used.

Bit

151413

1110

ZH (R31)

Z15

Z14

Z13

Z12

Z11

Z10

ZL (R30)

Z7Z6Z5

Z4Z3

Z2Z1

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