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ATmega16U4 Datasheet(PDF) 166 Page - ATMEL Corporation |
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ATmega16U4 Datasheet(HTML) 166 Page - ATMEL Corporation |
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166 / 408 page ![]() 166 7766D–AVR–01/09 ATmega16U4/ATmega32U4 value. The automatic action programmed in COM4A1 and COM4A0 takes place as if a compare match had occurred, but no interrupt is generated. The FOC4A bit is always read as zero. • Bit 2 - FOC4B: Force Output Compare Match 4B The FOC4B bit is only active when the PWM4B bit specify a non-PWM mode. Writing a logical one to this bit forces a change in the Waveform Output (OCW4B) and the Out- put Compare pin (OC4B) according to the values already set in COM4B1 and COM4B0. If COM4B1 and COM4B0 written in the same cycle as FOC4B, the new settings will be used. The Force Output Compare bit can be used to change the output pin value regardless of the timer value. The automatic action programmed in COM4B1 and COM4B0 takes place as if a compare match had occurred, but no interrupt is generated. The FOC4B bit is always read as zero. • Bit 1 - PWM4A: Pulse Width Modulator A Enable When set (one) this bit enables PWM mode based on comparator OCR4A • Bit 0 - PWM4B: Pulse Width Modulator B Enable When set (one) this bit enables PWM mode based on comparator OCR4B. 15.12.2 TCCR4B – Timer/Counter4 Control Register B • Bit 7 - PWM4X: PWM Inversion Mode When this bit is set (one), the PWM Inversion Mode is selected and the Dead Time Generator outputs, OC4x and OC4x are inverted. • Bit 6 - PSR4: Prescaler Reset Timer/Counter4 When this bit is set (one), the Timer/Counter4 prescaler (TCNT4 is unaffected) will be reset. The bit will be cleared by hardware after the operation is performed. Writing a zero to this bit will have no effect. This bit will always read as zero. • Bits 5,4 - DTPS41, DTPS40: Dead Time Prescaler Bits The Timer/Counter4 Control Register B is a 8-bit read/write register. The dedicated Dead Time prescaler in front of the Dead Time Generator can divide the Timer/Counter4 clock (PCK or CK) by 1, 2, 4 or 8 providing a large range of dead times that can be generated. The Dead Time prescaler is controlled by two bits DTPS41 and DTPS40 from the Dead Time Prescaler register. These bits define the division factor of the Dead Time prescaler. The division factors are given in Table 15-14. Bit 76543210 PWM4X PSR4 DTPS41 DTPS40 CS43 CS42 CS41 CS40 TCCR4B Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial value 00000000 |
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